Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ad4d355b authored by Tomas Winkler's avatar Tomas Winkler Committed by Greg Kroah-Hartman
Browse files

mei: me: introduce power gating registers 



LPT devices have internal power gating handled
through registers and hbm calls

Signed-off-by: default avatarTomas Winkler <tomas.winkler@intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 4fcbc99b

drivers/misc/mei/hw-me-regs.h

+9 −0
Original line number Diff line number Diff line
@@ -133,6 +133,8 @@ 
#define ME_CB_RW   8

/* ME_CSR_HA - ME Control Status Host Access register (read only) */

#define ME_CSR_HA  0xC

/* H_HGC_CSR - PGI register */

#define H_HPG_CSR  0x10





/* register bits of H_CSR (Host Control Status register) */
@@ -162,6 +164,8 @@ access to ME_CBD */ 
#define ME_CBWP_HRA       0x00FF0000

/* ME CB Read Pointer HRA - host read only access to ME_CBRP */

#define ME_CBRP_HRA       0x0000FF00

/* ME Power Gate Isolation Capability HRA  - host ready only access */

#define ME_PGIC_HRA       0x00000040

/* ME Reset HRA - host read only access to ME_RST */

#define ME_RST_HRA        0x00000010

/* ME Ready HRA - host read only access to ME_RDY */
@@ -173,4 +177,9 @@ access to ME_CBD */ 
/* ME Interrupt Enable HRA - host read only access to ME_IE */

#define ME_IE_HRA         0x00000001





/* register bits - H_HPG_CSR */

#define H_HPG_CSR_PGIHEXR       0x00000001

#define H_HPG_CSR_PGI           0x00000002



#endif /* _MEI_HW_MEI_REGS_H_ */