[media] marvell-cam: Separate out the Marvell camera core

obj-$(CONFIG_VIDEO_CAFE_CCIC) += cafe_ccic.o

obj-$(CONFIG_VIDEO_CAFE_CCIC) += cafe_ccic.o

cafe_ccic-y := cafe-driver.o mcam-core.o

/*

 * A driver for the CMOS camera controller in the Marvell 88ALP01 "cafe"

 * multifunction chip.  Currently works with the Omnivision OV7670

 * sensor.

 *

 * The data sheet for this device can be found at:

 *    http://www.marvell.com/products/pc_connectivity/88alp01/

 *

 * Copyright 2006-11 One Laptop Per Child Association, Inc.

 * Copyright 2006-11 Jonathan Corbet <corbet@lwn.net>

 *

 * Written by Jonathan Corbet, corbet@lwn.net.

 *

 * v4l2_device/v4l2_subdev conversion by:

 * Copyright (C) 2009 Hans Verkuil <hverkuil@xs4all.nl>

 *

 * Note: this conversion is untested! Please contact the linux-media

 * mailinglist if you can test this, together with the test results.

 *

 * This file may be distributed under the terms of the GNU General

 * Public License, version 2.

 */

#include <linux/kernel.h>

#include <linux/module.h>

#include <linux/init.h>

#include <linux/pci.h>

#include <linux/i2c.h>

#include <linux/interrupt.h>

#include <linux/spinlock.h>

#include <linux/slab.h>

#include <linux/videodev2.h>

#include <media/v4l2-device.h>

#include <media/v4l2-chip-ident.h>

#include <linux/device.h>

#include <linux/wait.h>

#include <linux/delay.h>

#include <linux/io.h>

#include "mcam-core.h"

#define CAFE_VERSION 0x000002

/*

 * Parameters.

 */

MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>");

MODULE_DESCRIPTION("Marvell 88ALP01 CMOS Camera Controller driver");

MODULE_LICENSE("GPL");

MODULE_SUPPORTED_DEVICE("Video");

struct cafe_camera {

	int registered;			/* Fully initialized? */

	struct mcam_camera mcam;

	struct pci_dev *pdev;

	wait_queue_head_t smbus_wait;	/* Waiting on i2c events */

};

/*

 * Debugging and related.

 */

#define cam_err(cam, fmt, arg...) \

	dev_err(&(cam)->pdev->dev, fmt, ##arg);

#define cam_warn(cam, fmt, arg...) \

	dev_warn(&(cam)->pdev->dev, fmt, ##arg);

/* -------------------------------------------------------------------- */

/*

 * The I2C/SMBUS interface to the camera itself starts here.  The

 * controller handles SMBUS itself, presenting a relatively simple register

 * interface; all we have to do is to tell it where to route the data.

 */

#define CAFE_SMBUS_TIMEOUT (HZ)  /* generous */

static inline struct cafe_camera *to_cam(struct v4l2_device *dev)

{

	struct mcam_camera *m = container_of(dev, struct mcam_camera, v4l2_dev);

	return container_of(m, struct cafe_camera, mcam);

}

static int cafe_smbus_write_done(struct mcam_camera *mcam)

{

	unsigned long flags;

	int c1;

	/*

	 * We must delay after the interrupt, or the controller gets confused

	 * and never does give us good status.  Fortunately, we don't do this

	 * often.

	 */

	udelay(20);

	spin_lock_irqsave(&mcam->dev_lock, flags);

	c1 = mcam_reg_read(mcam, REG_TWSIC1);

	spin_unlock_irqrestore(&mcam->dev_lock, flags);

	return (c1 & (TWSIC1_WSTAT|TWSIC1_ERROR)) != TWSIC1_WSTAT;

}

static int cafe_smbus_write_data(struct cafe_camera *cam,

		u16 addr, u8 command, u8 value)

{

	unsigned int rval;

	unsigned long flags;

	struct mcam_camera *mcam = &cam->mcam;

	spin_lock_irqsave(&mcam->dev_lock, flags);

	rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID);

	rval |= TWSIC0_OVMAGIC;  /* Make OV sensors work */

	/*

	 * Marvell sez set clkdiv to all 1's for now.

	 */

	rval |= TWSIC0_CLKDIV;

	mcam_reg_write(mcam, REG_TWSIC0, rval);

	(void) mcam_reg_read(mcam, REG_TWSIC1); /* force write */

	rval = value | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR);

	mcam_reg_write(mcam, REG_TWSIC1, rval);

	spin_unlock_irqrestore(&mcam->dev_lock, flags);

	/* Unfortunately, reading TWSIC1 too soon after sending a command

	 * causes the device to die.

	 * Use a busy-wait because we often send a large quantity of small

	 * commands at-once; using msleep() would cause a lot of context

	 * switches which take longer than 2ms, resulting in a noticeable

	 * boot-time and capture-start delays.

	 */

	mdelay(2);

	/*

	 * Another sad fact is that sometimes, commands silently complete but

	 * cafe_smbus_write_done() never becomes aware of this.

	 * This happens at random and appears to possible occur with any

	 * command.

	 * We don't understand why this is. We work around this issue

	 * with the timeout in the wait below, assuming that all commands

	 * complete within the timeout.

	 */

	wait_event_timeout(cam->smbus_wait, cafe_smbus_write_done(mcam),

			CAFE_SMBUS_TIMEOUT);

	spin_lock_irqsave(&mcam->dev_lock, flags);

	rval = mcam_reg_read(mcam, REG_TWSIC1);

	spin_unlock_irqrestore(&mcam->dev_lock, flags);

	if (rval & TWSIC1_WSTAT) {

		cam_err(cam, "SMBUS write (%02x/%02x/%02x) timed out\n", addr,

				command, value);

		return -EIO;

	}

	if (rval & TWSIC1_ERROR) {

		cam_err(cam, "SMBUS write (%02x/%02x/%02x) error\n", addr,

				command, value);

		return -EIO;

	}

	return 0;

}

static int cafe_smbus_read_done(struct mcam_camera *mcam)

{

	unsigned long flags;

	int c1;

	/*

	 * We must delay after the interrupt, or the controller gets confused

	 * and never does give us good status.  Fortunately, we don't do this

	 * often.

	 */

	udelay(20);

	spin_lock_irqsave(&mcam->dev_lock, flags);

	c1 = mcam_reg_read(mcam, REG_TWSIC1);

	spin_unlock_irqrestore(&mcam->dev_lock, flags);

	return c1 & (TWSIC1_RVALID|TWSIC1_ERROR);

}

static int cafe_smbus_read_data(struct cafe_camera *cam,

		u16 addr, u8 command, u8 *value)

{

	unsigned int rval;

	unsigned long flags;

	struct mcam_camera *mcam = &cam->mcam;

	spin_lock_irqsave(&mcam->dev_lock, flags);

	rval = TWSIC0_EN | ((addr << TWSIC0_SID_SHIFT) & TWSIC0_SID);

	rval |= TWSIC0_OVMAGIC; /* Make OV sensors work */

	/*

	 * Marvel sez set clkdiv to all 1's for now.

	 */

	rval |= TWSIC0_CLKDIV;

	mcam_reg_write(mcam, REG_TWSIC0, rval);

	(void) mcam_reg_read(mcam, REG_TWSIC1); /* force write */

	rval = TWSIC1_READ | ((command << TWSIC1_ADDR_SHIFT) & TWSIC1_ADDR);

	mcam_reg_write(mcam, REG_TWSIC1, rval);

	spin_unlock_irqrestore(&mcam->dev_lock, flags);

	wait_event_timeout(cam->smbus_wait,

			cafe_smbus_read_done(mcam), CAFE_SMBUS_TIMEOUT);

	spin_lock_irqsave(&mcam->dev_lock, flags);

	rval = mcam_reg_read(mcam, REG_TWSIC1);

	spin_unlock_irqrestore(&mcam->dev_lock, flags);

	if (rval & TWSIC1_ERROR) {

		cam_err(cam, "SMBUS read (%02x/%02x) error\n", addr, command);

		return -EIO;

	}

	if (!(rval & TWSIC1_RVALID)) {

		cam_err(cam, "SMBUS read (%02x/%02x) timed out\n", addr,

				command);

		return -EIO;

	}

	*value = rval & 0xff;

	return 0;

}

/*

 * Perform a transfer over SMBUS.  This thing is called under

 * the i2c bus lock, so we shouldn't race with ourselves...

 */

static int cafe_smbus_xfer(struct i2c_adapter *adapter, u16 addr,

		unsigned short flags, char rw, u8 command,

		int size, union i2c_smbus_data *data)

{

	struct cafe_camera *cam = i2c_get_adapdata(adapter);

	int ret = -EINVAL;

	/*

	 * This interface would appear to only do byte data ops.  OK

	 * it can do word too, but the cam chip has no use for that.

	 */

	if (size != I2C_SMBUS_BYTE_DATA) {

		cam_err(cam, "funky xfer size %d\n", size);

		return -EINVAL;

	}

	if (rw == I2C_SMBUS_WRITE)

		ret = cafe_smbus_write_data(cam, addr, command, data->byte);

	else if (rw == I2C_SMBUS_READ)

		ret = cafe_smbus_read_data(cam, addr, command, &data->byte);

	return ret;

}

static void cafe_smbus_enable_irq(struct cafe_camera *cam)

{

	unsigned long flags;

	spin_lock_irqsave(&cam->mcam.dev_lock, flags);

	mcam_reg_set_bit(&cam->mcam, REG_IRQMASK, TWSIIRQS);

	spin_unlock_irqrestore(&cam->mcam.dev_lock, flags);

}

static u32 cafe_smbus_func(struct i2c_adapter *adapter)

{

	return I2C_FUNC_SMBUS_READ_BYTE_DATA  |

	       I2C_FUNC_SMBUS_WRITE_BYTE_DATA;

}

static struct i2c_algorithm cafe_smbus_algo = {

	.smbus_xfer = cafe_smbus_xfer,

	.functionality = cafe_smbus_func

};

static int cafe_smbus_setup(struct cafe_camera *cam)

{

	struct i2c_adapter *adap = &cam->mcam.i2c_adapter;

	int ret;

	cafe_smbus_enable_irq(cam);

	adap->owner = THIS_MODULE;

	adap->algo = &cafe_smbus_algo;

	strcpy(adap->name, "cafe_ccic");

	adap->dev.parent = &cam->pdev->dev;

	i2c_set_adapdata(adap, cam);

	ret = i2c_add_adapter(adap);

	if (ret)

		printk(KERN_ERR "Unable to register cafe i2c adapter\n");

	return ret;

}

static void cafe_smbus_shutdown(struct cafe_camera *cam)

{

	i2c_del_adapter(&cam->mcam.i2c_adapter);

}

/*

 * Controller-level stuff

 */

static void cafe_ctlr_init(struct mcam_camera *mcam)

{

	unsigned long flags;

	spin_lock_irqsave(&mcam->dev_lock, flags);

	/*

	 * Added magic to bring up the hardware on the B-Test board

	 */

	mcam_reg_write(mcam, 0x3038, 0x8);

	mcam_reg_write(mcam, 0x315c, 0x80008);

	/*

	 * Go through the dance needed to wake the device up.

	 * Note that these registers are global and shared

	 * with the NAND and SD devices.  Interaction between the

	 * three still needs to be examined.

	 */

	mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRS|GCSR_MRS); /* Needed? */

	mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRC|GCSR_MRC);

	mcam_reg_write(mcam, REG_GL_CSR, GCSR_SRC|GCSR_MRS);

	/*

	 * Here we must wait a bit for the controller to come around.

	 */

	spin_unlock_irqrestore(&mcam->dev_lock, flags);

	msleep(5);

	spin_lock_irqsave(&mcam->dev_lock, flags);

	mcam_reg_write(mcam, REG_GL_CSR, GCSR_CCIC_EN|GCSR_SRC|GCSR_MRC);

	mcam_reg_set_bit(mcam, REG_GL_IMASK, GIMSK_CCIC_EN);

	/*

	 * Mask all interrupts.

	 */

	mcam_reg_write(mcam, REG_IRQMASK, 0);

	spin_unlock_irqrestore(&mcam->dev_lock, flags);

}

static void cafe_ctlr_power_up(struct mcam_camera *mcam)

{

	/*

	 * Part one of the sensor dance: turn the global

	 * GPIO signal on.

	 */

	mcam_reg_write(mcam, REG_GL_FCR, GFCR_GPIO_ON);

	mcam_reg_write(mcam, REG_GL_GPIOR, GGPIO_OUT|GGPIO_VAL);

	/*

	 * Put the sensor into operational mode (assumes OLPC-style

	 * wiring).  Control 0 is reset - set to 1 to operate.

	 * Control 1 is power down, set to 0 to operate.

	 */

	mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN); /* pwr up, reset */

	mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C0);

}

static void cafe_ctlr_power_down(struct mcam_camera *mcam)

{

	mcam_reg_write(mcam, REG_GPR, GPR_C1EN|GPR_C0EN|GPR_C1);

	mcam_reg_write(mcam, REG_GL_FCR, GFCR_GPIO_ON);

	mcam_reg_write(mcam, REG_GL_GPIOR, GGPIO_OUT);

}

/*

 * The platform interrupt handler.

 */

static irqreturn_t cafe_irq(int irq, void *data)

{

	struct cafe_camera *cam = data;

	struct mcam_camera *mcam = &cam->mcam;

	unsigned int irqs, handled;

	spin_lock(&mcam->dev_lock);

	irqs = mcam_reg_read(mcam, REG_IRQSTAT);

	handled = cam->registered && mccic_irq(mcam, irqs);

	if (irqs & TWSIIRQS) {

		mcam_reg_write(mcam, REG_IRQSTAT, TWSIIRQS);

		wake_up(&cam->smbus_wait);

		handled = 1;

	}

	spin_unlock(&mcam->dev_lock);

	return IRQ_RETVAL(handled);

}

/* -------------------------------------------------------------------------- */

/*

 * PCI interface stuff.

 */

static int cafe_pci_probe(struct pci_dev *pdev,

		const struct pci_device_id *id)

{

	int ret;

	struct cafe_camera *cam;

	struct mcam_camera *mcam;

	/*

	 * Start putting together one of our big camera structures.

	 */

	ret = -ENOMEM;

	cam = kzalloc(sizeof(struct cafe_camera), GFP_KERNEL);

	if (cam == NULL)

		goto out;

	cam->pdev = pdev;

	mcam = &cam->mcam;

	mcam->chip_id = V4L2_IDENT_CAFE;

	spin_lock_init(&mcam->dev_lock);

	init_waitqueue_head(&cam->smbus_wait);

	mcam->plat_power_up = cafe_ctlr_power_up;

	mcam->plat_power_down = cafe_ctlr_power_down;

	mcam->dev = &pdev->dev;

	/*

	 * Get set up on the PCI bus.

	 */

	ret = pci_enable_device(pdev);

	if (ret)

		goto out_free;

	pci_set_master(pdev);

	ret = -EIO;

	mcam->regs = pci_iomap(pdev, 0, 0);

	if (!mcam->regs) {

		printk(KERN_ERR "Unable to ioremap cafe-ccic regs\n");

		goto out_disable;

	}

	ret = request_irq(pdev->irq, cafe_irq, IRQF_SHARED, "cafe-ccic", cam);

	if (ret)

		goto out_iounmap;

	/*

	 * Initialize the controller and leave it powered up.  It will

	 * stay that way until the sensor driver shows up.

	 */

	cafe_ctlr_init(mcam);

	cafe_ctlr_power_up(mcam);

	/*

	 * Set up I2C/SMBUS communications.  We have to drop the mutex here

	 * because the sensor could attach in this call chain, leading to

	 * unsightly deadlocks.

	 */

	ret = cafe_smbus_setup(cam);

	if (ret)

		goto out_pdown;

	ret = mccic_register(mcam);

	if (ret == 0) {

		cam->registered = 1;

		return 0;

	}

	cafe_smbus_shutdown(cam);

out_pdown:

	cafe_ctlr_power_down(mcam);

	free_irq(pdev->irq, cam);

out_iounmap:

	pci_iounmap(pdev, mcam->regs);

out_disable:

	pci_disable_device(pdev);

out_free:

	kfree(cam);

out:

	return ret;

}

/*

 * Shut down an initialized device

 */

static void cafe_shutdown(struct cafe_camera *cam)

{

	mccic_shutdown(&cam->mcam);

	cafe_smbus_shutdown(cam);

	free_irq(cam->pdev->irq, cam);

	pci_iounmap(cam->pdev, cam->mcam.regs);

}

static void cafe_pci_remove(struct pci_dev *pdev)

{

	struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev);

	struct cafe_camera *cam = to_cam(v4l2_dev);

	if (cam == NULL) {

		printk(KERN_WARNING "pci_remove on unknown pdev %p\n", pdev);

		return;

	}

	cafe_shutdown(cam);

	kfree(cam);

}

#ifdef CONFIG_PM

/*

 * Basic power management.

 */

static int cafe_pci_suspend(struct pci_dev *pdev, pm_message_t state)

{

	struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev);

	struct cafe_camera *cam = to_cam(v4l2_dev);

	int ret;

	ret = pci_save_state(pdev);

	if (ret)

		return ret;

	mccic_suspend(&cam->mcam);

	pci_disable_device(pdev);

	return 0;

}

static int cafe_pci_resume(struct pci_dev *pdev)

{

	struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev);

	struct cafe_camera *cam = to_cam(v4l2_dev);

	int ret = 0;

	pci_restore_state(pdev);

	ret = pci_enable_device(pdev);

	if (ret) {

		cam_warn(cam, "Unable to re-enable device on resume!\n");

		return ret;

	}

	cafe_ctlr_init(&cam->mcam);

	return mccic_resume(&cam->mcam);

}

#endif  /* CONFIG_PM */

static struct pci_device_id cafe_ids[] = {

	{ PCI_DEVICE(PCI_VENDOR_ID_MARVELL,

		     PCI_DEVICE_ID_MARVELL_88ALP01_CCIC) },

	{ 0, }

};

MODULE_DEVICE_TABLE(pci, cafe_ids);

static struct pci_driver cafe_pci_driver = {

	.name = "cafe1000-ccic",

	.id_table = cafe_ids,

	.probe = cafe_pci_probe,

	.remove = cafe_pci_remove,

#ifdef CONFIG_PM

	.suspend = cafe_pci_suspend,

	.resume = cafe_pci_resume,

#endif

};

static int __init cafe_init(void)

{

	int ret;

	printk(KERN_NOTICE "Marvell M88ALP01 'CAFE' Camera Controller version %d\n",

			CAFE_VERSION);

	ret = pci_register_driver(&cafe_pci_driver);

	if (ret) {

		printk(KERN_ERR "Unable to register cafe_ccic driver\n");

		goto out;

	}

	ret = 0;

out:

	return ret;

}

static void __exit cafe_exit(void)

{

	pci_unregister_driver(&cafe_pci_driver);

}

module_init(cafe_init);

module_exit(cafe_exit);

/*

 * Marvell camera core structures.

 *

 * Copyright 2011 Jonathan Corbet corbet@lwn.net

 */

/*

 * Tracking of streaming I/O buffers.

 * FIXME doesn't belong in this file

 */

struct mcam_sio_buffer {

	struct list_head list;

	struct v4l2_buffer v4lbuf;

	char *buffer;   /* Where it lives in kernel space */

	int mapcount;

	struct mcam_camera *cam;

};

enum mcam_state {

	S_NOTREADY,	/* Not yet initialized */

	S_IDLE,		/* Just hanging around */

	S_FLAKED,	/* Some sort of problem */

	S_SINGLEREAD,	/* In read() */

	S_SPECREAD,	/* Speculative read (for future read()) */

	S_STREAMING	/* Streaming data */

};

#define MAX_DMA_BUFS 3

/*

 * A description of one of our devices.

 * Locking: controlled by s_mutex.  Certain fields, however, require

 *          the dev_lock spinlock; they are marked as such by comments.

 *          dev_lock is also required for access to device registers.

 */

struct mcam_camera {

	/*

	 * These fields should be set by the platform code prior to

	 * calling mcam_register().

	 */

	struct i2c_adapter i2c_adapter;

	unsigned char __iomem *regs;

	spinlock_t dev_lock;

	struct device *dev; /* For messages, dma alloc */

	unsigned int chip_id;

	/*

	 * Callbacks from the core to the platform code.

	 */

	void (*plat_power_up) (struct mcam_camera *cam);

	void (*plat_power_down) (struct mcam_camera *cam);

	/*

	 * Everything below here is private to the mcam core and

	 * should not be touched by the platform code.

	 */

	struct v4l2_device v4l2_dev;

	enum mcam_state state;

	unsigned long flags;		/* Buffer status, mainly (dev_lock) */

	int users;			/* How many open FDs */

	struct file *owner;		/* Who has data access (v4l2) */

	/*

	 * Subsystem structures.

	 */

	struct video_device vdev;

	struct v4l2_subdev *sensor;

	unsigned short sensor_addr;

	struct list_head dev_list;	/* link to other devices */

	/* DMA buffers */

	unsigned int nbufs;		/* How many are alloc'd */

	int next_buf;			/* Next to consume (dev_lock) */

	unsigned int dma_buf_size;	/* allocated size */

	void *dma_bufs[MAX_DMA_BUFS];	/* Internal buffer addresses */

	dma_addr_t dma_handles[MAX_DMA_BUFS]; /* Buffer bus addresses */

	unsigned int specframes;	/* Unconsumed spec frames (dev_lock) */

	unsigned int sequence;		/* Frame sequence number */

	unsigned int buf_seq[MAX_DMA_BUFS]; /* Sequence for individual buffers */

	/* Streaming buffers */

	unsigned int n_sbufs;		/* How many we have */

	struct mcam_sio_buffer *sb_bufs; /* The array of housekeeping structs */

	struct list_head sb_avail;	/* Available for data (we own) (dev_lock) */

	struct list_head sb_full;	/* With data (user space owns) (dev_lock) */

	struct tasklet_struct s_tasklet;

	/* Current operating parameters */

	u32 sensor_type;		/* Currently ov7670 only */

	struct v4l2_pix_format pix_format;

	enum v4l2_mbus_pixelcode mbus_code;

	/* Locks */

	struct mutex s_mutex; /* Access to this structure */

	/* Misc */

	wait_queue_head_t iowait;	/* Waiting on frame data */

};

/*

 * Register I/O functions.  These are here because the platform code

 * may legitimately need to mess with the register space.