Merge "ARM: dts: msm: Add SW43404 cmd panel support for QRD855" into msm-4.14 (abbe85c5) · Commits · e / devices / android_kernel_oneplus_sm8150

arch/arm64/boot/dts/qcom/dsi-panel-sw43404-amoled-dsc-wqhd-cmd.dtsi

0 → 100644

+104 −0

Original line number	Diff line number	Diff line
		/* Copyright (c) 2018, The Linux Foundation. All rights reserved.
		*
		* This program is free software; you can redistribute it and/or modify
		* it under the terms of the GNU General Public License version 2 and
		* only version 2 as published by the Free Software Foundation.
		*
		* This program is distributed in the hope that it will be useful,
		* but WITHOUT ANY WARRANTY; without even the implied warranty of
		* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
		* GNU General Public License for more details.
		*/

		&mdss_mdp {
		dsi_sw43404_amoled_cmd: qcom,mdss_dsi_sw43404_amoled_wqhd_cmd {
		qcom,mdss-dsi-panel-name =
		"sw43404 amoled cmd mode dsi boe panel with DSC";
		qcom,mdss-dsi-panel-type = "dsi_cmd_mode";
		qcom,mdss-dsi-virtual-channel-id = <0>;
		qcom,mdss-dsi-stream = <0>;
		qcom,mdss-dsi-bpp = <24>;
		qcom,mdss-dsi-color-order = "rgb_swap_rgb";
		qcom,mdss-dsi-underflow-color = <0xff>;
		qcom,mdss-dsi-border-color = <0>;

		qcom,mdss-dsi-traffic-mode = "non_burst_sync_event";
		qcom,mdss-dsi-lane-map = "lane_map_0123";
		qcom,mdss-dsi-bllp-eof-power-mode;
		qcom,mdss-dsi-bllp-power-mode;
		qcom,mdss-dsi-lane-0-state;
		qcom,mdss-dsi-lane-1-state;
		qcom,mdss-dsi-lane-2-state;
		qcom,mdss-dsi-lane-3-state;
		qcom,mdss-dsi-dma-trigger = "trigger_sw";
		qcom,mdss-dsi-mdp-trigger = "none";
		qcom,mdss-dsi-reset-sequence = <1 10>, <0 10>, <1 10>;
		qcom,mdss-dsi-bl-max-level = <255>;
		qcom,mdss-dsi-te-pin-select = <1>;
		qcom,mdss-dsi-wr-mem-start = <0x2c>;
		qcom,mdss-dsi-wr-mem-continue = <0x3c>;
		qcom,mdss-dsi-te-dcs-command = <1>;
		qcom,mdss-dsi-te-check-enable;
		qcom,mdss-dsi-te-using-te-pin;

		qcom,mdss-dsi-display-timings {
		timing@0{
		qcom,mdss-dsi-panel-framerate = <60>;
		qcom,mdss-dsi-panel-width = <1440>;
		qcom,mdss-dsi-panel-height = <2880>;
		qcom,mdss-dsi-h-front-porch = <160>;
		qcom,mdss-dsi-h-back-porch = <72>;
		qcom,mdss-dsi-h-pulse-width = <16>;
		qcom,mdss-dsi-h-sync-skew = <0>;
		qcom,mdss-dsi-v-back-porch = <8>;
		qcom,mdss-dsi-v-front-porch = <8>;
		qcom,mdss-dsi-v-pulse-width = <1>;
		qcom,mdss-dsi-h-left-border = <0>;
		qcom,mdss-dsi-h-right-border = <0>;
		qcom,mdss-dsi-v-top-border = <0>;
		qcom,mdss-dsi-v-bottom-border = <0>;
		qcom,mdss-dsi-panel-jitter = <0x1 0x1>;
		qcom,mdss-dsi-on-command = [
		39 01 00 00 00 00 03 b0 a5 00
		07 01 00 00 00 00 02 01 00
		0a 01 00 00 00 00 80 11 00 00 89 30 80
		0B 40 05 A0 05 A0 02 D0 02 D0 02 00
		02 68 00 20 9A DB 00 0A 00 0C 00 12
		00 0E 18 00 10 F0 03 0C 20 00 06 0B
		0B 33 0E 1C 2A 38 46 54 62 69 70 77
		79 7B 7D 7E 01 02 01 00 09 40 09 BE
		19 FC 19 FA 19 F8 1A 38 1A 78 1A B6
		2A F6 2B 34 2B 74 3B 74 6B F4 00 00
		00 00 00 00 00 00 00 00 00 00 00 00
		00 00 00 00 00 00 00 00 00 00 00 00
		00 00 00 00 00 00 00 00 00 00 00 00
		00 00
		39 01 00 00 00 00 03 b0 a5 00
		39 01 00 00 00 00 09 F8 00 08 10 08 2D
		00 00 2D
		15 01 00 00 00 00 02 55 0c
		05 01 00 00 1e 00 02 11 00
		39 01 00 00 00 00 03 b0 a5 00
		05 01 00 00 78 00 02 35 00
		05 01 00 00 00 00 02 29 00
		39 01 00 00 3c 00 03 51 80 03
		];

		qcom,mdss-dsi-off-command = [
		05 01 00 00 14 00 02 28 00
		05 01 00 00 78 00 02 10 00];
		qcom,mdss-dsi-on-command-state = "dsi_lp_mode";
		qcom,mdss-dsi-off-command-state = "dsi_hs_mode";
		qcom,mdss-dsi-h-sync-pulse = <0>;

		qcom,compression-mode = "dsc";
		qcom,mdss-dsc-slice-height = <1440>;
		qcom,mdss-dsc-slice-width = <720>;
		qcom,mdss-dsc-slice-per-pkt = <1>;
		qcom,mdss-dsc-bit-per-component = <8>;
		qcom,mdss-dsc-bit-per-pixel = <8>;
		qcom,mdss-dsc-block-prediction-enable;
		};
		};
		};
		};

arch/arm64/boot/dts/qcom/sdm855-qrd.dtsi

+52 −0

Original line number	Diff line number	Diff line
		@@ -73,6 +73,58 @@
		};
		};

		&tlmm {
		display_panel_avdd_eldo_default: display_panel_avdd_eldo_default {
		mux {
		pins = "gpio130";
		function = "gpio";
		};
		config {
		pins = "gpio130";
		drive-strength = <8>;
		bias-disable = <0>;
		output-low;
		};
		};
		};

		&soc {
		display_panel_avdd_eldo: gpio-regulator@0 {
		compatible = "regulator-fixed";
		regulator-name = "display_panel_avdd_eldo";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-enable-ramp-delay = <233>;
		gpio = <&tlmm 130 0>;
		enable-active-high;
		pinctrl-names = "default";
		pintctrl-0 = <&display_panel_avdd_eldo_default>;
		};
		};

		&dsi_panel_pwr_supply_vdd_no_labibb {
		qcom,panel-supply-entry@1 {
		qcom,supply-min-voltage = <1800000>;
		qcom,supply-max-voltage = <1800000>;
		};
		};

		&dsi_sw43404_amoled_cmd {
		qcom,panel-supply-entries = <&dsi_panel_pwr_supply_vdd_no_labibb>;
		qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
		qcom,mdss-dsi-bl-min-level = <1>;
		qcom,mdss-dsi-bl-max-level = <255>;
		qcom,mdss-dsi-mode-sel-gpio-state = "single_port";
		qcom,panel-mode-gpio = <&tlmm 7 0>;
		qcom,platform-te-gpio = <&tlmm 8 0>;
		qcom,platform-reset-gpio = <&tlmm 6 0>;
		};

		&dsi_sw43404_amoled_cmd_display {
		qcom,dsi-display-active;
		vdd-supply = <&display_panel_avdd_eldo>;
		};

		&ufsphy_mem {
		compatible = "qcom,ufs-phy-qmp-v4";

arch/arm64/boot/dts/qcom/sdm855-sde-display.dtsi

+36 −0

Original line number	Diff line number	Diff line
		@@ -25,6 +25,7 @@
		#include "dsi-panel-sharp-1080p-cmd.dtsi"
		#include "dsi-panel-sharp-dualmipi-1080p-120hz.dtsi"
		#include "dsi-panel-s6e3ha3-amoled-dualmipi-wqhd-cmd.dtsi"
		#include "dsi-panel-sw43404-amoled-dsc-wqhd-cmd.dtsi"
		#include <dt-bindings/clock/mdss-10nm-pll-clk.h>

		&soc {
		@@ -403,6 +404,28 @@
		qcom,dsi-panel = <&dsi_dual_sim_dsc_375_cmd>;
		};

		dsi_sw43404_amoled_cmd_display: qcom,dsi-display@14 {
		compatible = "qcom,dsi-display";
		label = "dsi_sw43404_amoled_cmd_display";
		qcom,display-type = "primary";

		qcom,dsi-ctrl = <&mdss_dsi0>;
		qcom,dsi-phy = <&mdss_dsi_phy0>;
		clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,
		<&mdss_dsi0_pll PCLK_MUX_0_CLK>;
		clock-names = "src_byte_clk", "src_pixel_clk";

		pinctrl-names = "panel_active", "panel_suspend";
		pinctrl-0 = <&sde_dsi_active &sde_te_active>;
		pinctrl-1 = <&sde_dsi_suspend &sde_te_suspend>;
		qcom,platform-te-gpio = <&tlmm 8 0>;
		qcom,platform-reset-gpio = <&tlmm 6 0>;
		qcom,panel-mode-gpio = <&tlmm 7 0>;

		qcom,dsi-panel = <&dsi_sw43404_amoled_cmd>;
		vddio-supply = <&pm855_l14>;
		};

		sde_wb: qcom,wb-display@0 {
		compatible = "qcom,wb-display";
		cell-index = <0>;
		@@ -651,3 +674,16 @@
		};
		};
		};

		&dsi_sw43404_amoled_cmd {
		qcom,mdss-dsi-t-clk-post = <0x16>;
		qcom,mdss-dsi-t-clk-pre = <0x16>;
		qcom,mdss-dsi-display-timings {
		timing@0 {
		qcom,mdss-dsi-panel-phy-timings = [00 1a 07 06 22 21 07
		07 04 03 04 00 16 16];
		qcom,display-topology = <2 2 1>;
		qcom,default-topology-index = <0>;
		};
		};
		};