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Commit ab3ff7ff authored by Kyle Piefer's avatar Kyle Piefer Committed by Gerrit - the friendly Code Review server
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msm: kgsl: Count inter-frame power collapses 



It is useful to know how many times inter-frame
power collapse happens. Enable the IFPC counters
and add a trace and a sysfs node to allow tracking
the count.

Change-Id: I670126d9e61f3831b6c60b895ba373a3be98a029
Signed-off-by: default avatarKyle Piefer <kpiefer@codeaurora.org>
parent ae80f72b

drivers/gpu/msm/adreno.c

+23 −0
Original line number Diff line number Diff line
@@ -1967,6 +1967,17 @@ static int _adreno_start(struct adreno_device *adreno_dev) 
		}

	}



	if (gmu_core_isenabled(device) && adreno_dev->perfctr_ifpc_lo == 0) {

		ret = adreno_perfcounter_get(adreno_dev,

				KGSL_PERFCOUNTER_GROUP_GPMU_PWR, 4,

				&adreno_dev->perfctr_ifpc_lo, NULL,

				PERFCOUNTER_FLAG_KERNEL);

		if (ret) {

			WARN_ONCE(1, "Unable to get perf counter for IFPC\n");

			adreno_dev->perfctr_ifpc_lo = 0;

		}

	}



	/* Clear the busy_data stats - we're starting over from scratch */

	adreno_dev->busy_data.gpu_busy = 0;

	adreno_dev->busy_data.bif_ram_cycles = 0;
@@ -1975,6 +1986,7 @@ static int _adreno_start(struct adreno_device *adreno_dev) 
	adreno_dev->busy_data.bif_ram_cycles_write_ch1 = 0;

	adreno_dev->busy_data.bif_starved_ram = 0;

	adreno_dev->busy_data.bif_starved_ram_ch1 = 0;

	adreno_dev->busy_data.num_ifpc = 0;



	/* Restore performance counter registers with saved values */

	adreno_perfcounter_restore(adreno_dev);
@@ -3456,6 +3468,17 @@ static void adreno_power_stats(struct kgsl_device *device, 
		stats->ram_time = ram_cycles;

		stats->ram_wait = starved_ram;

	}



	if (adreno_dev->perfctr_ifpc_lo != 0) {

		uint32_t num_ifpc;



		num_ifpc = counter_delta(device, adreno_dev->perfctr_ifpc_lo,

				&busy->num_ifpc);

		adreno_dev->ifpc_count += num_ifpc;

		if (num_ifpc > 0)

			trace_adreno_ifpc_count(adreno_dev->ifpc_count);

	}



	if (adreno_dev->lm_threshold_count &&

			gpudev->count_throttles)

		gpudev->count_throttles(adreno_dev, adj);

drivers/gpu/msm/adreno.h

+5 −0
Original line number Diff line number Diff line
@@ -306,6 +306,7 @@ struct adreno_busy_data { 
	unsigned int bif_ram_cycles_write_ch1;

	unsigned int bif_starved_ram;

	unsigned int bif_starved_ram_ch1;

	unsigned int num_ifpc;

	unsigned int throttle_cycles[ADRENO_GPMU_THROTTLE_COUNTERS];

};
@@ -443,6 +444,7 @@ enum gpu_coresight_sources { 
 * stall cycles in case of GBIF)

 * @starved_ram_lo_ch1: Number of cycles GBIF is stalled by DDR channel 1

 * @perfctr_pwr_lo: GPU busy cycles

 * @perfctr_ifpc_lo: IFPC count

 * @halt: Atomic variable to check whether the GPU is currently halted

 * @pending_irq_refcnt: Atomic variable to keep track of running IRQ handlers

 * @ctx_d_debugfs: Context debugfs node
@@ -460,6 +462,7 @@ enum gpu_coresight_sources { 
 * @lm_limit: limiting value for LM

 * @lm_threshold_count: register value for counter for lm threshold breakin

 * @lm_threshold_cross: number of current peaks exceeding threshold

 * @ifpc_count: Number of times the GPU went into IFPC

 * @speed_bin: Indicate which power level set to use

 * @csdev: Pointer to a coresight device (if applicable)

 * @gpmu_throttle_counters - counteers for number of throttled clocks
@@ -509,6 +512,7 @@ struct adreno_device { 
	unsigned int starved_ram_lo;

	unsigned int starved_ram_lo_ch1;

	unsigned int perfctr_pwr_lo;

	unsigned int perfctr_ifpc_lo;

	atomic_t halt;

	atomic_t pending_irq_refcnt;

	struct dentry *ctx_d_debugfs;
@@ -528,6 +532,7 @@ struct adreno_device { 
	uint32_t lm_limit;

	uint32_t lm_threshold_count;

	uint32_t lm_threshold_cross;

	uint32_t ifpc_count;



	unsigned int speed_bin;

	unsigned int quirks;

drivers/gpu/msm/adreno_sysfs.c

+7 −0
Original line number Diff line number Diff line
@@ -300,6 +300,11 @@ static unsigned int _ifpc_show(struct adreno_device *adreno_dev) 
	return adreno_gmu_ifpc_show(adreno_dev);

}



static unsigned int _ifpc_count_show(struct adreno_device *adreno_dev)

{

	return adreno_dev->ifpc_count;

}



static unsigned int _preempt_count_show(struct adreno_device *adreno_dev)

{

	struct adreno_preemption *preempt = &adreno_dev->preempt;
@@ -410,6 +415,7 @@ static ADRENO_SYSFS_BOOL(preemption); 
static ADRENO_SYSFS_BOOL(hwcg);

static ADRENO_SYSFS_BOOL(throttling);

static ADRENO_SYSFS_BOOL(ifpc);

static ADRENO_SYSFS_RO_U32(ifpc_count);
@@ -431,6 +437,7 @@ static const struct device_attribute *_attr_list[] = { 
	&adreno_attr_usesgmem.attr,

	&adreno_attr_skipsaverestore.attr,

	&adreno_attr_ifpc.attr,

	&adreno_attr_ifpc_count.attr,

	&adreno_attr_preempt_count.attr,

	NULL,

};

drivers/gpu/msm/adreno_trace.h

+14 −1
Original line number Diff line number Diff line 
/* Copyright (c) 2013-2017, The Linux Foundation. All rights reserved.

/* Copyright (c) 2013-2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -609,6 +609,19 @@ TRACE_EVENT(adreno_preempt_done, 
		__entry->next->id, __entry->cur->id, __entry->level

	)

);



TRACE_EVENT(adreno_ifpc_count,

	TP_PROTO(unsigned int ifpc_count),

	TP_ARGS(ifpc_count),

	TP_STRUCT__entry(

		__field(unsigned int, ifpc_count)

	),

	TP_fast_assign(

		__entry->ifpc_count = ifpc_count;

	),

	TP_printk("total times GMU entered IFPC = %d", __entry->ifpc_count)

);



#endif /* _ADRENO_TRACE_H */



/* This part must be outside protection */