Merge branch 'soc' into boards

/*

 * Device Tree Source for the sh7377 SoC

 *

 * Copyright (C) 2012 Renesas Solutions Corp.

 *

 * This file is licensed under the terms of the GNU General Public License

 * version 2.  This program is licensed "as is" without any warranty of any

 * kind, whether express or implied.

 */

/include/ "skeleton.dtsi"

/ {

	compatible = "renesas,sh7377";

	cpus {

		cpu@0 {

			compatible = "arm,cortex-a8";

		};

	};

};

# CONFIG_IPC_NS is not set

# CONFIG_PID_NS is not set

CONFIG_CC_OPTIMIZE_FOR_SIZE=y

CONFIG_PERF_EVENTS=y

CONFIG_SLAB=y

CONFIG_MODULES=y

CONFIG_MODULE_UNLOAD=y

comment "SH-Mobile System Type"

config ARCH_SH7367

	bool "SH-Mobile G3 (SH7367)"

	select ARCH_WANT_OPTIONAL_GPIOLIB

	select CPU_V6

	select SH_CLK_CPG

config ARCH_SH7377

	bool "SH-Mobile G4 (SH7377)"

	select ARCH_WANT_OPTIONAL_GPIOLIB

	select CPU_V7

	select SH_CLK_CPG

config ARCH_SH7372

	bool "SH-Mobile AP4 (SH7372)"

	select ARCH_WANT_OPTIONAL_GPIOLIB

obj-y				:= timer.o console.o clock.o

# CPU objects

obj-$(CONFIG_ARCH_SH7367)	+= setup-sh7367.o clock-sh7367.o intc-sh7367.o

obj-$(CONFIG_ARCH_SH7377)	+= setup-sh7377.o clock-sh7377.o intc-sh7377.o

obj-$(CONFIG_ARCH_SH7372)	+= setup-sh7372.o clock-sh7372.o intc-sh7372.o

obj-$(CONFIG_ARCH_SH73A0)	+= setup-sh73a0.o clock-sh73a0.o intc-sh73a0.o

obj-$(CONFIG_ARCH_R8A7740)	+= setup-r8a7740.o clock-r8a7740.o intc-r8a7740.o

# Pinmux setup

pfc-y				:=

pfc-$(CONFIG_ARCH_SH7367)	+= pfc-sh7367.o

pfc-$(CONFIG_ARCH_SH7377)	+= pfc-sh7377.o

pfc-$(CONFIG_ARCH_SH7372)	+= pfc-sh7372.o

pfc-$(CONFIG_ARCH_SH73A0)	+= pfc-sh73a0.o

pfc-$(CONFIG_ARCH_R8A7740)	+= pfc-r8a7740.o

pfc-$(CONFIG_ARCH_R8A7779)	+= pfc-r8a7779.o

# IRQ objects

obj-$(CONFIG_ARCH_SH7367)	+= entry-intc.o

obj-$(CONFIG_ARCH_SH7377)	+= entry-intc.o

obj-$(CONFIG_ARCH_SH7372)	+= entry-intc.o

obj-$(CONFIG_ARCH_R8A7740)	+= entry-intc.o

static int fsi_hdmi_set_rate(struct device *dev, int rate, int enable)

{

	struct clk *fsib_clk;

	struct clk *fdiv_clk = &sh7372_fsidivb_clk;

	struct clk *fdiv_clk = clk_get(NULL, "fsidivb");

	long fsib_rate = 0;

	long fdiv_rate = 0;

	int ackmd_bpfmd;