Merge "mhi: core: expose current state of MHI device to clients" (aa583033) · Commits · e / devices / android_kernel_oneplus_sm8150

drivers/bus/mhi/core/mhi_boot.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -50,7 +50,7 @@ static int __mhi_download_rddm_in_panic(struct mhi_controller *mhi_cntrl)
		struct mhi_buf *mhi_buf;
		u32 sequence_id;
		u32 rx_status;
		enum MHI_EE ee;
		enum mhi_ee ee;
		struct image_info *rddm_image = mhi_cntrl->rddm_image;
		const u32 delayus = 100;
		u32 retry = (mhi_cntrl->timeout_ms * 1000) / delayus;

drivers/bus/mhi/core/mhi_internal.h

+5 −29

Original line number	Diff line number	Diff line
		@@ -375,19 +375,6 @@ enum MHI_BRSTMODE {
		#define MHI_INVALID_BRSTMODE(mode) (mode != MHI_BRSTMODE_DISABLE && \
		mode != MHI_BRSTMODE_ENABLE)

		enum MHI_EE {
		MHI_EE_PBL = 0x0,
		MHI_EE_SBL = 0x1,
		MHI_EE_AMSS = 0x2,
		MHI_EE_BHIE = 0x3,
		MHI_EE_RDDM = 0x4,
		MHI_EE_PTHRU = 0x5,
		MHI_EE_EDL = 0x6,
		MHI_EE_MAX_SUPPORTED = MHI_EE_EDL,
		MHI_EE_DISABLE_TRANSITION, /* local EE, not related to mhi spec */
		MHI_EE_MAX,
		};

		extern const char * const mhi_ee_str[MHI_EE_MAX];
		#define TO_MHI_EXEC_STR(ee) (((ee) >= MHI_EE_MAX) ? \
		"INVALID_EE" : mhi_ee_str[ee])
		@@ -408,18 +395,6 @@ extern const char * const mhi_state_tran_str[MHI_ST_TRANSITION_MAX];
		#define TO_MHI_STATE_TRANS_STR(state) (((state) >= MHI_ST_TRANSITION_MAX) ? \
		"INVALID_STATE" : mhi_state_tran_str[state])

		enum MHI_STATE {
		MHI_STATE_RESET = 0x0,
		MHI_STATE_READY = 0x1,
		MHI_STATE_M0 = 0x2,
		MHI_STATE_M1 = 0x3,
		MHI_STATE_M2 = 0x4,
		MHI_STATE_M3 = 0x5,
		MHI_STATE_BHI = 0x7,
		MHI_STATE_SYS_ERR = 0xFF,
		MHI_STATE_MAX,
		};

		extern const char * const mhi_state_str[MHI_STATE_MAX];
		#define TO_MHI_STATE_STR(state) ((state >= MHI_STATE_MAX \|\| \
		!mhi_state_str[state]) ? \
		@@ -596,7 +571,7 @@ struct mhi_chan {
		u32 intmod;
		enum dma_data_direction dir;
		struct db_cfg db_cfg;
		enum MHI_EE ee;
		enum mhi_ee ee;
		enum MHI_XFER_TYPE xfer_type;
		enum MHI_CH_STATE ch_state;
		enum MHI_EV_CCS ccs;
		@@ -663,8 +638,8 @@ enum MHI_PM_STATE __must_check mhi_tryset_pm_state(
		const char *to_mhi_pm_state_str(enum MHI_PM_STATE state);
		void mhi_reset_chan(struct mhi_controller *mhi_cntrl,
		struct mhi_chan *mhi_chan);
		enum MHI_EE mhi_get_exec_env(struct mhi_controller *mhi_cntrl);
		enum MHI_STATE mhi_get_m_state(struct mhi_controller *mhi_cntrl);
		enum mhi_ee mhi_get_exec_env(struct mhi_controller *mhi_cntrl);
		enum mhi_dev_state mhi_get_m_state(struct mhi_controller *mhi_cntrl);
		int mhi_queue_state_transition(struct mhi_controller *mhi_cntrl,
		enum MHI_ST_TRANSITION state);
		void mhi_pm_st_worker(struct work_struct *work);
		@@ -720,7 +695,8 @@ void mhi_write_db(struct mhi_controller mhi_cntrl, void __iomem db_addr,
		void mhi_ring_cmd_db(struct mhi_controller mhi_cntrl, struct mhi_cmd mhi_cmd);
		void mhi_ring_chan_db(struct mhi_controller *mhi_cntrl,
		struct mhi_chan *mhi_chan);
		void mhi_set_mhi_state(struct mhi_controller *mhi_cntrl, enum MHI_STATE state);
		void mhi_set_mhi_state(struct mhi_controller *mhi_cntrl,
		enum mhi_dev_state state);
		int mhi_get_capability_offset(struct mhi_controller *mhi_cntrl, u32 capability,
		u32 *offset);
		int mhi_init_timesync(struct mhi_controller *mhi_cntrl);

drivers/bus/mhi/core/mhi_main.c

+8 −8

Original line number	Diff line number	Diff line
		@@ -182,7 +182,7 @@ void mhi_ring_chan_db(struct mhi_controller *mhi_cntrl,
		db);
		}

		enum MHI_EE mhi_get_exec_env(struct mhi_controller *mhi_cntrl)
		enum mhi_ee mhi_get_exec_env(struct mhi_controller *mhi_cntrl)
		{
		u32 exec;
		int ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_EXECENV, &exec);
		@@ -190,7 +190,7 @@ enum MHI_EE mhi_get_exec_env(struct mhi_controller *mhi_cntrl)
		return (ret) ? MHI_EE_MAX : exec;
		}

		enum MHI_STATE mhi_get_m_state(struct mhi_controller *mhi_cntrl)
		enum mhi_dev_state mhi_get_m_state(struct mhi_controller *mhi_cntrl)
		{
		u32 state;
		int ret = mhi_read_reg_field(mhi_cntrl, mhi_cntrl->regs, MHISTATUS,
		@@ -920,7 +920,7 @@ int mhi_process_ctrl_ev_ring(struct mhi_controller *mhi_cntrl,
		switch (type) {
		case MHI_PKT_TYPE_STATE_CHANGE_EVENT:
		{
		enum MHI_STATE new_state;
		enum mhi_dev_state new_state;

		new_state = MHI_TRE_GET_EV_STATE(local_rp);

		@@ -964,7 +964,7 @@ int mhi_process_ctrl_ev_ring(struct mhi_controller *mhi_cntrl,
		case MHI_PKT_TYPE_EE_EVENT:
		{
		enum MHI_ST_TRANSITION st = MHI_ST_TRANSITION_MAX;
		enum MHI_EE event = MHI_TRE_GET_EV_EXECENV(local_rp);
		enum mhi_ee event = MHI_TRE_GET_EV_EXECENV(local_rp);

		MHI_LOG("MHI EE received event:%s\n",
		TO_MHI_EXEC_STR(event));
		@@ -984,7 +984,7 @@ int mhi_process_ctrl_ev_ring(struct mhi_controller *mhi_cntrl,
		write_lock_irq(&mhi_cntrl->pm_lock);
		mhi_cntrl->ee = event;
		write_unlock_irq(&mhi_cntrl->pm_lock);
		wake_up(&mhi_cntrl->state_event);
		wake_up_all(&mhi_cntrl->state_event);
		break;
		default:
		MHI_ERR("Unhandled EE event:%s\n",
		@@ -1160,7 +1160,7 @@ void mhi_ctrl_ev_task(unsigned long data)
		{
		struct mhi_event mhi_event = (struct mhi_event )data;
		struct mhi_controller *mhi_cntrl = mhi_event->mhi_cntrl;
		enum MHI_STATE state = MHI_STATE_MAX;
		enum mhi_dev_state state = MHI_STATE_MAX;
		enum MHI_PM_STATE pm_state = 0;
		int ret;

		@@ -1218,7 +1218,7 @@ irqreturn_t mhi_msi_handlr(int irq_number, void *dev)
		irqreturn_t mhi_intvec_threaded_handlr(int irq_number, void *dev)
		{
		struct mhi_controller *mhi_cntrl = dev;
		enum MHI_STATE state = MHI_STATE_MAX;
		enum mhi_dev_state state = MHI_STATE_MAX;
		enum MHI_PM_STATE pm_state = 0;

		MHI_VERB("Enter\n");
		@@ -1247,7 +1247,7 @@ irqreturn_t mhi_intvec_handlr(int irq_number, void *dev)

		/* wake up any events waiting for state change */
		MHI_VERB("Enter\n");
		wake_up(&mhi_cntrl->state_event);
		wake_up_all(&mhi_cntrl->state_event);
		MHI_VERB("Exit\n");

		return IRQ_WAKE_THREAD;

drivers/bus/mhi/core/mhi_pm.c

+12 −7

Original line number	Diff line number	Diff line
		@@ -148,7 +148,8 @@ enum MHI_PM_STATE __must_check mhi_tryset_pm_state(
		return mhi_cntrl->pm_state;
		}

		void mhi_set_mhi_state(struct mhi_controller *mhi_cntrl, enum MHI_STATE state)
		void mhi_set_mhi_state(struct mhi_controller *mhi_cntrl,
		enum mhi_dev_state state)
		{
		if (state == MHI_STATE_RESET) {
		mhi_write_reg_field(mhi_cntrl, mhi_cntrl->regs, MHICTRL,
		@@ -357,7 +358,7 @@ int mhi_pm_m0_transition(struct mhi_controller *mhi_cntrl)

		mhi_cntrl->wake_put(mhi_cntrl, false);
		read_unlock_bh(&mhi_cntrl->pm_lock);
		wake_up(&mhi_cntrl->state_event);
		wake_up_all(&mhi_cntrl->state_event);
		MHI_VERB("Exited\n");

		return 0;
		@@ -377,6 +378,7 @@ void mhi_pm_m1_transition(struct mhi_controller *mhi_cntrl)
		mhi_cntrl->M2++;

		write_unlock_irq(&mhi_cntrl->pm_lock);
		wake_up_all(&mhi_cntrl->state_event);

		/* transfer pending, exit M2 immediately */
		if (unlikely(atomic_read(&mhi_cntrl->dev_wake))) {
		@@ -409,7 +411,7 @@ int mhi_pm_m3_transition(struct mhi_controller *mhi_cntrl)
		to_mhi_pm_state_str(mhi_cntrl->pm_state));
		return -EIO;
		}
		wake_up(&mhi_cntrl->state_event);
		wake_up_all(&mhi_cntrl->state_event);
		mhi_cntrl->M3++;

		MHI_LOG("Entered mhi_state:%s pm_state:%s\n",
		@@ -428,7 +430,7 @@ static int mhi_pm_amss_transition(struct mhi_controller *mhi_cntrl)
		write_lock_irq(&mhi_cntrl->pm_lock);
		mhi_cntrl->ee = MHI_EE_AMSS;
		write_unlock_irq(&mhi_cntrl->pm_lock);
		wake_up(&mhi_cntrl->state_event);
		wake_up_all(&mhi_cntrl->state_event);

		/* add elements to all HW event rings */
		read_lock_bh(&mhi_cntrl->pm_lock);
		@@ -498,6 +500,9 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl,
		}
		write_unlock_irq(&mhi_cntrl->pm_lock);

		/* wake up any threads waiting for state transitions */
		wake_up_all(&mhi_cntrl->state_event);

		/* not handling sys_err, could be middle of shut down */
		if (cur_state != transition_state) {
		MHI_LOG("Failed to transition to state:0x%x from:0x%x\n",
		@@ -550,7 +555,7 @@ static void mhi_pm_disable_transition(struct mhi_controller *mhi_cntrl,
		/* release lock and wait for all pending thread to complete */
		mutex_unlock(&mhi_cntrl->pm_mutex);
		MHI_LOG("Waiting for all pending threads to complete\n");
		wake_up(&mhi_cntrl->state_event);
		wake_up_all(&mhi_cntrl->state_event);
		flush_work(&mhi_cntrl->st_worker);
		flush_work(&mhi_cntrl->fw_worker);

		@@ -697,7 +702,7 @@ void mhi_pm_st_worker(struct work_struct *work)
		mhi_cntrl->ee = mhi_get_exec_env(mhi_cntrl);
		write_unlock_irq(&mhi_cntrl->pm_lock);
		if (MHI_IN_PBL(mhi_cntrl->ee))
		wake_up(&mhi_cntrl->state_event);
		wake_up_all(&mhi_cntrl->state_event);
		break;
		case MHI_ST_TRANSITION_SBL:
		write_lock_irq(&mhi_cntrl->pm_lock);
		@@ -722,7 +727,7 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl)
		{
		int ret;
		u32 val;
		enum MHI_EE current_ee;
		enum mhi_ee current_ee;
		enum MHI_ST_TRANSITION next_state;

		MHI_LOG("Requested to power on\n");

include/linux/mhi.h

+40 −2

Original line number	Diff line number	Diff line
		@@ -72,6 +72,44 @@ enum mhi_device_type {
		MHI_CONTROLLER_TYPE,
		};

		/**
		* enum mhi_ee - device current execution enviornment
		* @MHI_EE_PBL - device in PBL
		* @MHI_EE_SBL - device in SBL
		* @MHI_EE_AMSS - device in mission mode (firmware fully loaded)
		* @MHI_EE_BHIE - device in special SBL that support BHI/e protocol
		* @MHI_EE_RDDM - device in ram dump collection mode
		* @MHI_EE_PTHRU - device in PBL but configured in pass thru mode
		* @MHI_EE_EDL - device in emergency download mode
		*/
		enum mhi_ee {
		MHI_EE_PBL = 0x0,
		MHI_EE_SBL = 0x1,
		MHI_EE_AMSS = 0x2,
		MHI_EE_BHIE = 0x3,
		MHI_EE_RDDM = 0x4,
		MHI_EE_PTHRU = 0x5,
		MHI_EE_EDL = 0x6,
		MHI_EE_MAX_SUPPORTED = MHI_EE_EDL,
		MHI_EE_DISABLE_TRANSITION, /* local EE, not related to mhi spec */
		MHI_EE_MAX,
		};

		/**
		* enum mhi_dev_state - device current MHI state
		*/
		enum mhi_dev_state {
		MHI_STATE_RESET = 0x0,
		MHI_STATE_READY = 0x1,
		MHI_STATE_M0 = 0x2,
		MHI_STATE_M1 = 0x3,
		MHI_STATE_M2 = 0x4,
		MHI_STATE_M3 = 0x5,
		MHI_STATE_BHI = 0x7,
		MHI_STATE_SYS_ERR = 0xFF,
		MHI_STATE_MAX,
		};

		/**
		* struct image_info - firmware and rddm table table
		* @mhi_buf - Contain device firmware and rddm table
		@@ -195,8 +233,8 @@ struct mhi_controller {
		bool pre_init;
		rwlock_t pm_lock;
		u32 pm_state;
		u32 ee;
		u32 dev_state;
		enum mhi_ee ee;
		enum mhi_dev_state dev_state;
		bool wake_set;
		atomic_t dev_wake;
		atomic_t alloc_size;