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Commit aa43014b authored by Hareesh Gundu's avatar Hareesh Gundu
Browse files

msm: kgsl: Add out of bound check for gmu register access 



Read/write operation to out of gmu register address space
will not give the expected results. Add a check to allow the
access to gmu registers only.

Change-Id: Ifb88c1966137531daa5c7a58c70a9bdf0a584b23
Signed-off-by: default avatarHareesh Gundu <hareeshg@codeaurora.org>
parent c426bc6f

drivers/gpu/msm/kgsl_gmu_core.c

+15 −0
Original line number Diff line number Diff line
@@ -193,6 +193,11 @@ void gmu_core_regread(struct kgsl_device *device, unsigned int offsetwords, 
{

	struct gmu_core_ops *gmu_core_ops = GMU_CORE_OPS(device);



	if (!gmu_core_is_register_offset(device, offsetwords)) {

		WARN(1, "Out of bounds register read: 0x%x\n", offsetwords);

		return;

	}



	if (gmu_core_ops && gmu_core_ops->regread)

		gmu_core_ops->regread(device, offsetwords, value);

	else
@@ -204,6 +209,11 @@ void gmu_core_regwrite(struct kgsl_device *device, unsigned int offsetwords, 
{

	struct gmu_core_ops *gmu_core_ops = GMU_CORE_OPS(device);



	if (!gmu_core_is_register_offset(device, offsetwords)) {

		WARN(1, "Out of bounds register write: 0x%x\n", offsetwords);

		return;

	}



	if (gmu_core_ops && gmu_core_ops->regwrite)

		gmu_core_ops->regwrite(device, offsetwords, value);

}
@@ -214,6 +224,11 @@ void gmu_core_regrmw(struct kgsl_device *device, 
{

	unsigned int val = 0;



	if (!gmu_core_is_register_offset(device, offsetwords)) {

		WARN(1, "Out of bounds register rmw: 0x%x\n", offsetwords);

		return;

	}



	gmu_core_regread(device, offsetwords, &val);

	val &= ~mask;

	gmu_core_regwrite(device, offsetwords, val | bits);