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Commit a9434e96 authored by Kevin Hilman's avatar Kevin Hilman
Browse files

ARM: hi3xxx: add smp support 



Enable SMP support on hi3xxx platform

Signed-off-by: default avatarZhangfei Gao <zhangfei.gao@linaro.org>
Tested-by: default avatarZhang Mingjun <zhang.mingjun@linaro.org>
Tested-by: default avatarLi Xin <li.xin@linaro.org>
Signed-off-by: default avatarHaojian Zhuang <haojian.zhuang@linaro.org>
[khilman: fix checkpatch errors]
Signed-off-by: default avatarKevin Hilman <khilman@linaro.org>
parent 524b7df9

Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt

+26 −0
Original line number Diff line number Diff line
@@ -4,3 +4,29 @@ Hisilicon Platforms Device Tree Bindings 
Hi4511 Board

Required root node properties:

	- compatible = "hisilicon,hi3620-hi4511";



Hisilicon system controller



Required properties:

- compatible : "hisilicon,sysctrl"

- reg : Register address and size



Optional properties:

- smp-offset : offset in sysctrl for notifying slave cpu booting

		cpu 1, reg;

		cpu 2, reg + 0x4;

		cpu 3, reg + 0x8;

		If reg value is not zero, cpun exit wfi and go

- resume-offset : offset in sysctrl for notifying cpu0 when resume

- reboot-offset : offset in sysctrl for system reboot



Example:



	/* for Hi3620 */

	sysctrl: system-controller@fc802000 {

		compatible = "hisilicon,sysctrl";

		reg = <0xfc802000 0x1000>;

		smp-offset = <0x31c>;

		resume-offset = <0x308>;

		reboot-offset = <0x4>;

	};

arch/arm/boot/dts/hi3620.dtsi

+38 −0
Original line number Diff line number Diff line
@@ -39,6 +39,27 @@ 
			reg = <0x0>;

			next-level-cache = <&L2>;

		};



		cpu@1 {

			compatible = "arm,cortex-a9";

			device_type = "cpu";

			reg = <1>;

			next-level-cache = <&L2>;

		};



		cpu@2 {

			compatible = "arm,cortex-a9";

			device_type = "cpu";

			reg = <2>;

			next-level-cache = <&L2>;

		};



		cpu@3 {

			compatible = "arm,cortex-a9";

			device_type = "cpu";

			reg = <3>;

			next-level-cache = <&L2>;

		};

	};



	amba {
@@ -65,6 +86,17 @@ 
			reg = <0x1000 0x1000>, <0x100 0x100>;

		};



		sysctrl: system-controller@802000 {

			compatible = "hisilicon,sysctrl";

			reg = <0x802000 0x1000>;

			#address-cells = <1>;

			#size-cells = <0>;



			smp-offset = <0x31c>;

			resume-offset = <0x308>;

			reboot-offset = <0x4>;

		};



		dual_timer0: dual_timer@800000 {

			compatible = "arm,sp804", "arm,primecell";

			reg = <0x800000 0x1000>;
@@ -115,6 +147,12 @@ 
			status = "disabled";

		};



		timer5: timer@600 {

			compatible = "arm,cortex-a9-twd-timer";

			reg = <0x600 0x20>;

			interrupts = <1 13 0xf01>;

		};



		uart0: uart@b00000 {

			compatible = "arm,pl011", "arm,primecell";

			reg = <0xb00000 0x1000>;

arch/arm/mach-hi3xxx/Kconfig

+4 −0
Original line number Diff line number Diff line
@@ -7,7 +7,11 @@ config ARCH_HI3xxx 
	select CACHE_L2X0

	select CLKSRC_OF

	select GENERIC_CLOCKEVENTS

	select HAVE_ARM_SCU

	select HAVE_ARM_TWD

	select HAVE_SMP

	select PINCTRL

	select PINCTRL_SINGLE

	select SMP

	help

	  Support for Hisilicon Hi36xx/Hi37xx processor family

arch/arm/mach-hi3xxx/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -3,3 +3,4 @@ 
#



obj-y	+= hi3xxx.o

obj-$(CONFIG_SMP)		+= platsmp.o

arch/arm/mach-hi3xxx/core.h

0 → 100644
+11 −0
Original line number Diff line number Diff line 
#ifndef __HISILICON_CORE_H

#define __HISILICON_CORE_H



#include <linux/reboot.h>



extern void hi3xxx_set_cpu_jump(int cpu, void *jump_addr);

extern int hi3xxx_get_cpu_jump(int cpu);

extern void secondary_startup(void);

extern struct smp_operations hi3xxx_smp_ops;



#endif