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Commit a928c675 authored by Tomi Valkeinen's avatar Tomi Valkeinen Committed by Greg Kroah-Hartman
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drm/bridge: tc358767: fix output H/V syncs 



[ Upstream commit 7923e09c7a766e2d58de7fc395bb84c18e5bc625 ]

The H and V syncs of the DP output are always set to active high. This
patch fixes the syncs by configuring them according to the videomode.

Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: default avatarAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: default avatarAndrzej Hajda <a.hajda@samsung.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190103115954.12785-7-tomi.valkeinen@ti.com


Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent 9a5bce69

drivers/gpu/drm/bridge/tc358767.c

+5 −1
Original line number Diff line number Diff line
@@ -96,6 +96,8 @@ 
#define DP0_STARTVAL		0x064c

#define DP0_ACTIVEVAL		0x0650

#define DP0_SYNCVAL		0x0654

#define SYNCVAL_HS_POL_ACTIVE_LOW	(1 << 15)

#define SYNCVAL_VS_POL_ACTIVE_LOW	(1 << 31)

#define DP0_MISC		0x0658

#define TU_SIZE_RECOMMENDED		(63) /* LSCLK cycles per TU */

#define BPC_6				(0 << 5)
@@ -724,7 +726,9 @@ static int tc_set_video_mode(struct tc_data *tc, struct drm_display_mode *mode) 


	tc_write(DP0_ACTIVEVAL, (mode->vdisplay << 16) | (mode->hdisplay));



	tc_write(DP0_SYNCVAL, (vsync_len << 16) | (hsync_len << 0));

	tc_write(DP0_SYNCVAL, (vsync_len << 16) | (hsync_len << 0) |

		 ((mode->flags & DRM_MODE_FLAG_NHSYNC) ? SYNCVAL_HS_POL_ACTIVE_LOW : 0) |

		 ((mode->flags & DRM_MODE_FLAG_NVSYNC) ? SYNCVAL_VS_POL_ACTIVE_LOW : 0));



	tc_write(DPIPXLFMT, VS_POL_ACTIVE_LOW | HS_POL_ACTIVE_LOW |

		 DE_POL_ACTIVE_HIGH | SUB_CFG_TYPE_CONFIG1 | DPI_BPP_RGB888);