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Commit a8309ced authored by Konstantin Porotchkin's avatar Konstantin Porotchkin Committed by Ulf Hansson
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clk: apn806: Add eMMC clock to system controller driver 



Add fixed clock of 400MHz to system controller driver.  This clock is
used as SD/eMMC clock source.

Signed-off-by: default avatarKonstantin Porotchkin <kostap@marvell.com>
Reviewed-by: default avatarOmri Itach <omrii@marvell.com>
Reviewed-by: default avatarHanna Hawa <hannah@marvell.com>
[fixed up conflicts, added error handling --rmk]
Signed-off-by: default avatarRussell King <rmk+kernel@armlinux.org.uk>
Acked-by: default avatarStephen Boyd <sboyd@codeaurora.org>
Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 25fc8465

arch/arm64/boot/dts/marvell/armada-ap806.dtsi

+2 −1
Original line number Original line Diff line number Diff line
@@ -235,7 +235,8 @@ 
				#clock-cells = <1>;

				#clock-cells = <1>;

				clock-output-names = "ap-cpu-cluster-0",

				clock-output-names = "ap-cpu-cluster-0",

						     "ap-cpu-cluster-1",

						     "ap-cpu-cluster-1",

						     "ap-fixed", "ap-mss";

						     "ap-fixed", "ap-mss",

						     "ap-emmc";

				reg = <0x6f4000 0x1000>;

				reg = <0x6f4000 0x1000>;

			};

			};

		};

		};

drivers/clk/mvebu/ap806-system-controller.c

+14 −1
Original line number Original line Diff line number Diff line
@@ -23,7 +23,7 @@ 
#define AP806_SAR_REG			0x400

#define AP806_SAR_REG			0x400

#define AP806_SAR_CLKFREQ_MODE_MASK	0x1f

#define AP806_SAR_CLKFREQ_MODE_MASK	0x1f





#define AP806_CLK_NUM			4

#define AP806_CLK_NUM			5





static struct clk *ap806_clks[AP806_CLK_NUM];

static struct clk *ap806_clks[AP806_CLK_NUM];
@@ -135,6 +135,17 @@ static int ap806_syscon_clk_probe(struct platform_device *pdev) 
		goto fail3;

		goto fail3;

	}

	}





	/* eMMC Clock is fixed clock divided by 3 */

	of_property_read_string_index(np, "clock-output-names",

				      4, &name);

	ap806_clks[4] = clk_register_fixed_factor(NULL, name, fixedclk_name,

						  0, 1, 3);

	if (IS_ERR(ap806_clks[4])) {

		ret = PTR_ERR(ap806_clks[4]);

		goto fail4;

	}



	of_clk_add_provider(np, of_clk_src_onecell_get, &ap806_clk_data);

	ret = of_clk_add_provider(np, of_clk_src_onecell_get, &ap806_clk_data);

	ret = of_clk_add_provider(np, of_clk_src_onecell_get, &ap806_clk_data);

	if (ret)

	if (ret)

		goto fail_clk_add;

		goto fail_clk_add;
@@ -142,6 +153,8 @@ static int ap806_syscon_clk_probe(struct platform_device *pdev) 
	return 0;

	return 0;





fail_clk_add:

fail_clk_add:

	clk_unregister_fixed_factor(ap806_clks[4]);

fail4:

	clk_unregister_fixed_factor(ap806_clks[3]);

	clk_unregister_fixed_factor(ap806_clks[3]);

fail3:

fail3:

	clk_unregister_fixed_rate(ap806_clks[2]);

	clk_unregister_fixed_rate(ap806_clks[2]);