Loading Documentation/devicetree/bindings/clock/qcom,videocc.txt +2 −1 Original line number Diff line number Diff line Qualcomm Technologies, Inc. Video Clock & Reset Controller Bindings Required properties: - compatible: shall contain "qcom,videocc-sm8150" or "qcom,videocc-sm8150-v2". - compatible: shall contain "qcom,videocc-sm8150" or "qcom,videocc-sm8150-v2" or "qcom,videocc-sm6150". - reg: shall contain base register location and length. - reg-names: names of registers listed in the same order as in the reg property. - vdd_mm-supply: the logic rail supply. Loading arch/arm64/boot/dts/qcom/sm6150-gdsc.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -196,7 +196,7 @@ /* GDSCs in Video CC */ vcodec0_gdsc: qcom,gdsc@ab00874 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; regulator-name = "vcodec0_gdsc"; reg = <0xab00874 0x4>; qcom,poll-cfg-gdscr; Loading @@ -204,7 +204,7 @@ }; venus_gdsc: qcom,gdsc@ab00814 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; regulator-name = "venus_gdsc"; reg = <0xab00814 0x4>; qcom,poll-cfg-gdscr; Loading arch/arm64/boot/dts/qcom/sm6150.dtsi +4 −2 Original line number Diff line number Diff line Loading @@ -620,8 +620,10 @@ }; clock_videocc: qcom,videocc { compatible = "qcom,dummycc"; clock-output-names = "videocc_clocks"; compatible = "qcom,videocc-sm6150", "syscon"; reg = <0xab00000 0x10000>; reg-names = "cc_base"; vdd_cx-supply = <&pm6150_s1_level>; #clock-cells = <1>; #reset-cells = <1>; }; Loading drivers/clk/qcom/Kconfig +9 −0 Original line number Diff line number Diff line Loading @@ -358,3 +358,12 @@ config MSM_GPUCC_SM6150 Support for the graphics clock controller on Qualcomm Technologies, Inc. SM6150 devices. Say Y if you want to support graphics clocks. config MSM_VIDEOCC_SM6150 tristate "SM6150 Video Clock Controller" depends on COMMON_CLK_QCOM help Support for the video clock controller on Qualcomm Technologies, Inc. SM6150 devices. Say Y if you want to support video devices and functionality such as video encode/decode. drivers/clk/qcom/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -51,6 +51,7 @@ obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o obj-$(CONFIG_MSM_NPUCC_SM8150) += npucc-sm8150.o obj-$(CONFIG_MSM_VIDEOCC_SM6150) += videocc-sm6150.o obj-$(CONFIG_MSM_VIDEOCC_SM8150) += videocc-sm8150.o obj-$(CONFIG_QCOM_CLK_RPM) += clk-rpm.o obj-$(CONFIG_QCOM_CLK_SMD_RPM) += clk-smd-rpm.o Loading Loading
Documentation/devicetree/bindings/clock/qcom,videocc.txt +2 −1 Original line number Diff line number Diff line Qualcomm Technologies, Inc. Video Clock & Reset Controller Bindings Required properties: - compatible: shall contain "qcom,videocc-sm8150" or "qcom,videocc-sm8150-v2". - compatible: shall contain "qcom,videocc-sm8150" or "qcom,videocc-sm8150-v2" or "qcom,videocc-sm6150". - reg: shall contain base register location and length. - reg-names: names of registers listed in the same order as in the reg property. - vdd_mm-supply: the logic rail supply. Loading
arch/arm64/boot/dts/qcom/sm6150-gdsc.dtsi +2 −2 Original line number Diff line number Diff line Loading @@ -196,7 +196,7 @@ /* GDSCs in Video CC */ vcodec0_gdsc: qcom,gdsc@ab00874 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; regulator-name = "vcodec0_gdsc"; reg = <0xab00874 0x4>; qcom,poll-cfg-gdscr; Loading @@ -204,7 +204,7 @@ }; venus_gdsc: qcom,gdsc@ab00814 { compatible = "regulator-fixed"; compatible = "qcom,gdsc"; regulator-name = "venus_gdsc"; reg = <0xab00814 0x4>; qcom,poll-cfg-gdscr; Loading
arch/arm64/boot/dts/qcom/sm6150.dtsi +4 −2 Original line number Diff line number Diff line Loading @@ -620,8 +620,10 @@ }; clock_videocc: qcom,videocc { compatible = "qcom,dummycc"; clock-output-names = "videocc_clocks"; compatible = "qcom,videocc-sm6150", "syscon"; reg = <0xab00000 0x10000>; reg-names = "cc_base"; vdd_cx-supply = <&pm6150_s1_level>; #clock-cells = <1>; #reset-cells = <1>; }; Loading
drivers/clk/qcom/Kconfig +9 −0 Original line number Diff line number Diff line Loading @@ -358,3 +358,12 @@ config MSM_GPUCC_SM6150 Support for the graphics clock controller on Qualcomm Technologies, Inc. SM6150 devices. Say Y if you want to support graphics clocks. config MSM_VIDEOCC_SM6150 tristate "SM6150 Video Clock Controller" depends on COMMON_CLK_QCOM help Support for the video clock controller on Qualcomm Technologies, Inc. SM6150 devices. Say Y if you want to support video devices and functionality such as video encode/decode.
drivers/clk/qcom/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -51,6 +51,7 @@ obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o obj-$(CONFIG_MSM_NPUCC_SM8150) += npucc-sm8150.o obj-$(CONFIG_MSM_VIDEOCC_SM6150) += videocc-sm6150.o obj-$(CONFIG_MSM_VIDEOCC_SM8150) += videocc-sm8150.o obj-$(CONFIG_QCOM_CLK_RPM) += clk-rpm.o obj-$(CONFIG_QCOM_CLK_SMD_RPM) += clk-smd-rpm.o Loading