Loading asoc/codecs/bolero/bolero-cdc-regmap.c +27 −0 Original line number Diff line number Diff line Loading @@ -816,6 +816,33 @@ static bool bolero_is_volatile_register(struct device *dev, case BOLERO_CDC_WSA_SPLINE_ASRC1_STATUS_FMAX_CNTR_LSB: case BOLERO_CDC_WSA_SPLINE_ASRC1_STATUS_FMAX_CNTR_MSB: case BOLERO_CDC_WSA_SPLINE_ASRC1_STATUS_FIFO: case BOLERO_CDC_RX_TOP_HPHL_COMP_RD_LSB: case BOLERO_CDC_RX_TOP_HPHL_COMP_RD_MSB: case BOLERO_CDC_RX_TOP_HPHR_COMP_RD_LSB: case BOLERO_CDC_RX_TOP_HPHR_COMP_RD_MSB: case BOLERO_CDC_RX_TOP_DSD0_DEBUG_CFG2: case BOLERO_CDC_RX_TOP_DSD1_DEBUG_CFG2: case BOLERO_CDC_RX_BCL_VBAT_GAIN_MON_VAL: case BOLERO_CDC_RX_BCL_VBAT_DECODE_ST: case BOLERO_CDC_RX_INTR_CTRL_PIN1_STATUS0: case BOLERO_CDC_RX_INTR_CTRL_PIN2_STATUS0: case BOLERO_CDC_RX_COMPANDER0_CTL6: case BOLERO_CDC_RX_COMPANDER1_CTL6: case BOLERO_CDC_RX_EC_ASRC0_STATUS_FMIN_CNTR_LSB: case BOLERO_CDC_RX_EC_ASRC0_STATUS_FMIN_CNTR_MSB: case BOLERO_CDC_RX_EC_ASRC0_STATUS_FMAX_CNTR_LSB: case BOLERO_CDC_RX_EC_ASRC0_STATUS_FMAX_CNTR_MSB: case BOLERO_CDC_RX_EC_ASRC0_STATUS_FIFO: case BOLERO_CDC_RX_EC_ASRC1_STATUS_FMIN_CNTR_LSB: case BOLERO_CDC_RX_EC_ASRC1_STATUS_FMIN_CNTR_MSB: case BOLERO_CDC_RX_EC_ASRC1_STATUS_FMAX_CNTR_LSB: case BOLERO_CDC_RX_EC_ASRC1_STATUS_FMAX_CNTR_MSB: case BOLERO_CDC_RX_EC_ASRC1_STATUS_FIFO: case BOLERO_CDC_RX_EC_ASRC2_STATUS_FMIN_CNTR_LSB: case BOLERO_CDC_RX_EC_ASRC2_STATUS_FMIN_CNTR_MSB: case BOLERO_CDC_RX_EC_ASRC2_STATUS_FMAX_CNTR_LSB: case BOLERO_CDC_RX_EC_ASRC2_STATUS_FMAX_CNTR_MSB: case BOLERO_CDC_RX_EC_ASRC2_STATUS_FIFO: return true; } return false; Loading Loading
asoc/codecs/bolero/bolero-cdc-regmap.c +27 −0 Original line number Diff line number Diff line Loading @@ -816,6 +816,33 @@ static bool bolero_is_volatile_register(struct device *dev, case BOLERO_CDC_WSA_SPLINE_ASRC1_STATUS_FMAX_CNTR_LSB: case BOLERO_CDC_WSA_SPLINE_ASRC1_STATUS_FMAX_CNTR_MSB: case BOLERO_CDC_WSA_SPLINE_ASRC1_STATUS_FIFO: case BOLERO_CDC_RX_TOP_HPHL_COMP_RD_LSB: case BOLERO_CDC_RX_TOP_HPHL_COMP_RD_MSB: case BOLERO_CDC_RX_TOP_HPHR_COMP_RD_LSB: case BOLERO_CDC_RX_TOP_HPHR_COMP_RD_MSB: case BOLERO_CDC_RX_TOP_DSD0_DEBUG_CFG2: case BOLERO_CDC_RX_TOP_DSD1_DEBUG_CFG2: case BOLERO_CDC_RX_BCL_VBAT_GAIN_MON_VAL: case BOLERO_CDC_RX_BCL_VBAT_DECODE_ST: case BOLERO_CDC_RX_INTR_CTRL_PIN1_STATUS0: case BOLERO_CDC_RX_INTR_CTRL_PIN2_STATUS0: case BOLERO_CDC_RX_COMPANDER0_CTL6: case BOLERO_CDC_RX_COMPANDER1_CTL6: case BOLERO_CDC_RX_EC_ASRC0_STATUS_FMIN_CNTR_LSB: case BOLERO_CDC_RX_EC_ASRC0_STATUS_FMIN_CNTR_MSB: case BOLERO_CDC_RX_EC_ASRC0_STATUS_FMAX_CNTR_LSB: case BOLERO_CDC_RX_EC_ASRC0_STATUS_FMAX_CNTR_MSB: case BOLERO_CDC_RX_EC_ASRC0_STATUS_FIFO: case BOLERO_CDC_RX_EC_ASRC1_STATUS_FMIN_CNTR_LSB: case BOLERO_CDC_RX_EC_ASRC1_STATUS_FMIN_CNTR_MSB: case BOLERO_CDC_RX_EC_ASRC1_STATUS_FMAX_CNTR_LSB: case BOLERO_CDC_RX_EC_ASRC1_STATUS_FMAX_CNTR_MSB: case BOLERO_CDC_RX_EC_ASRC1_STATUS_FIFO: case BOLERO_CDC_RX_EC_ASRC2_STATUS_FMIN_CNTR_LSB: case BOLERO_CDC_RX_EC_ASRC2_STATUS_FMIN_CNTR_MSB: case BOLERO_CDC_RX_EC_ASRC2_STATUS_FMAX_CNTR_LSB: case BOLERO_CDC_RX_EC_ASRC2_STATUS_FMAX_CNTR_MSB: case BOLERO_CDC_RX_EC_ASRC2_STATUS_FIFO: return true; } return false; Loading