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Commit a6c4e4cd authored by Linus Torvalds's avatar Linus Torvalds
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Merge branch 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 platform changes from Ingo Molnar:
 "The main changes in this cycle were:

   - SGI UV updates (Andrew Banman)

   - Intel MID updates (Andy Shevchenko)

   - Initial Mellanox systems platform (Vadim Pasternak)"

* 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/platform/mellanox: Fix return value check in mlxplat_init()
  x86/platform/mellanox: Introduce support for Mellanox systems platform
  x86/platform/uv/BAU: Add UV4-specific functions
  x86/platform/uv/BAU: Fix payload queue setup on UV4 hardware
  x86/platform/uv/BAU: Disable software timeout on UV4 hardware
  x86/platform/uv/BAU: Populate ->uvhub_version with UV4 version information
  x86/platform/uv/BAU: Use generic function pointers
  x86/platform/uv/BAU: Add generic function pointers
  x86/platform/uv/BAU: Convert uv_physnodeaddr() use to uv_gpa_to_offset()
  x86/platform/uv/BAU: Clean up pq_init()
  x86/platform/uv/BAU: Clean up and update printks
  x86/platform/uv/BAU: Clean up vertical alignment
  x86/platform/intel-mid: Keep SRAM powered on at boot
  x86/platform/intel-mid: Add Intel Penwell to ID table
  x86/cpu: Rename Merrifield2 to Moorefield
  x86/platform/intel-mid: Implement power off sequence
  x86/platform/intel-mid: Enable SD card detection on Merrifield
  x86/platform/intel-mid: Enable WiFi on Intel Edison
  x86/platform/intel-mid: Run PWRMU command immediately
parents a8adc0f0 65f74222

MAINTAINERS

+6 −0
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@@ -7683,6 +7683,12 @@ W: http://www.mellanox.com 
Q:	http://patchwork.ozlabs.org/project/netdev/list/

F:	drivers/net/ethernet/mellanox/mlxsw/



MELLANOX PLATFORM DRIVER

M:      Vadim Pasternak <vadimp@mellanox.com>

L:      platform-driver-x86@vger.kernel.org

S:      Supported

F:      arch/x86/platform/mellanox/mlx-platform.c



SOFT-ROCE DRIVER (rxe)

M:	Moni Shoua <monis@mellanox.com>

L:	linux-rdma@vger.kernel.org

arch/x86/Kconfig

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@@ -550,6 +550,18 @@ config X86_INTEL_QUARK 
	  Say Y here if you have a Quark based system such as the Arduino

	  compatible Intel Galileo.



config MLX_PLATFORM

	tristate "Mellanox Technologies platform support"

	depends on X86_64

	depends on X86_EXTENDED_PLATFORM

	---help---

	  This option enables system support for the Mellanox Technologies

	  platform.



	  Say Y here if you are building a kernel for Mellanox system.



	  Otherwise, say N.



config X86_INTEL_LPSS

	bool "Intel Low Power Subsystem Support"

	depends on X86 && ACPI

arch/x86/include/asm/intel-family.h

+2 −2
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@@ -56,8 +56,8 @@ 
#define INTEL_FAM6_ATOM_SILVERMONT1	0x37 /* BayTrail/BYT / Valleyview */

#define INTEL_FAM6_ATOM_SILVERMONT2	0x4D /* Avaton/Rangely */

#define INTEL_FAM6_ATOM_AIRMONT		0x4C /* CherryTrail / Braswell */

#define INTEL_FAM6_ATOM_MERRIFIELD1	0x4A /* Tangier */

#define INTEL_FAM6_ATOM_MERRIFIELD2	0x5A /* Annidale */

#define INTEL_FAM6_ATOM_MERRIFIELD	0x4A /* Tangier */

#define INTEL_FAM6_ATOM_MOOREFIELD	0x5A /* Annidale */

#define INTEL_FAM6_ATOM_GOLDMONT	0x5C

#define INTEL_FAM6_ATOM_DENVERTON	0x5F /* Goldmont Microserver */

arch/x86/include/asm/intel-mid.h

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@@ -18,6 +18,8 @@ 
extern int intel_mid_pci_init(void);

extern int intel_mid_pci_set_power_state(struct pci_dev *pdev, pci_power_t state);



extern void intel_mid_pwr_power_off(void);



#define INTEL_MID_PWR_LSS_OFFSET	4

#define INTEL_MID_PWR_LSS_TYPE		(1 << 7)

arch/x86/include/asm/intel_scu_ipc.h

+2 −0
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@@ -3,6 +3,8 @@ 


#include <linux/notifier.h>



#define IPCMSG_COLD_OFF		0x80	/* Only for Tangier */



#define IPCMSG_WARM_RESET	0xF0

#define IPCMSG_COLD_RESET	0xF1

#define IPCMSG_SOFT_RESET	0xF2