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Commit a6240725 authored by Wolfram Sang's avatar Wolfram Sang Committed by Shawn Guo
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ARM: mx28: check for gated clocks when setting saif divider



Like with all other clocks, the divider for the SAIF devices should not
be altered when the clock is gated. Bail out when this is the case like
the other clocks do.

Signed-off-by: default avatarWolfram Sang <w.sang@pengutronix.de>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Dong Aisheng-B29396 <B29396@freescale.com>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent bfc0b9c8
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+4 −0
Original line number Diff line number Diff line
@@ -477,6 +477,10 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
	reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs);		\
	reg &= ~BM_CLKCTRL_##rs##_DIV;					\
	reg |= div << BP_CLKCTRL_##rs##_DIV;				\
	if (reg & (1 << clk->enable_shift)) {				\
		pr_err("%s: clock is gated\n", __func__);		\
		return -EINVAL;						\
	}								\
	__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs);		\
									\
	for (i = 10000; i; i--)						\