Merge branch 'x86-fixes-for-linus' of... (a5b61736) · Commits · e / devices / android_kernel_oneplus_sm8150

arch/x86/Makefile

+1 −1

Original line number	Original line	Diff line number	Diff line
	@@ -74,7 +74,7 @@ endif

	ifdef CONFIG_CC_STACKPROTECTOR		ifdef CONFIG_CC_STACKPROTECTOR
	cc_has_sp := $(srctree)/scripts/gcc-x86_$(BITS)-has-stack-protector.sh		cc_has_sp := $(srctree)/scripts/gcc-x86_$(BITS)-has-stack-protector.sh
	ifeq ($(shell $(CONFIG_SHELL) $(cc_has_sp) $(CC) $(biarch)),y)		ifeq ($(shell $(CONFIG_SHELL) $(cc_has_sp) $(CC) $(KBUILD_CPPFLAGS) $(biarch)),y)
	stackp-y := -fstack-protector		stackp-y := -fstack-protector
	KBUILD_CFLAGS += $(stackp-y)		KBUILD_CFLAGS += $(stackp-y)
	else		else

arch/x86/include/asm/cpufeature.h

+2 −2

Original line number	Original line	Diff line number	Diff line
	@@ -296,6 +296,7 @@ extern const char * const x86_power_flags[32];

	#endif /* CONFIG_X86_64 */		#endif /* CONFIG_X86_64 */

			#if __GNUC__ >= 4
	/*		/*
	* Static testing of CPU features. Used the same as boot_cpu_has().		* Static testing of CPU features. Used the same as boot_cpu_has().
	* These are only valid after alternatives have run, but will statically		* These are only valid after alternatives have run, but will statically
	@@ -304,7 +305,7 @@ extern const char * const x86_power_flags[32];
	*/		*/
	static __always_inline __pure bool __static_cpu_has(u16 bit)		static __always_inline __pure bool __static_cpu_has(u16 bit)
	{		{
	#if __GNUC__ > 4 \|\| (__GNUC__ == 4 && __GNUC_MINOR__ >= 5)		#if __GNUC__ > 4 \|\| __GNUC_MINOR__ >= 5
	asm goto("1: jmp %l[t_no]\n"		asm goto("1: jmp %l[t_no]\n"
	"2:\n"		"2:\n"
	".section .altinstructions,\"a\"\n"		".section .altinstructions,\"a\"\n"
	@@ -345,7 +346,6 @@ static __always_inline __pure bool __static_cpu_has(u16 bit)
	#endif		#endif
	}		}

	#if __GNUC__ >= 4
	#define static_cpu_has(bit) \		#define static_cpu_has(bit) \
	( \		( \
	__builtin_constant_p(boot_cpu_has(bit)) ? \		__builtin_constant_p(boot_cpu_has(bit)) ? \

arch/x86/include/asm/hpet.h

+0 −1

Original line number	Original line	Diff line number	Diff line
	@@ -68,7 +68,6 @@ extern unsigned long force_hpet_address;
	extern u8 hpet_blockid;		extern u8 hpet_blockid;
	extern int hpet_force_user;		extern int hpet_force_user;
	extern u8 hpet_msi_disable;		extern u8 hpet_msi_disable;
	extern u8 hpet_readback_cmp;
	extern int is_hpet_enabled(void);		extern int is_hpet_enabled(void);
	extern int hpet_enable(void);		extern int hpet_enable(void);
	extern void hpet_disable(void);		extern void hpet_disable(void);

arch/x86/kernel/apic/x2apic_uv_x.c

+3 −3

Original line number	Original line	Diff line number	Diff line
	@@ -698,9 +698,11 @@ void __init uv_system_init(void)
	for (j = 0; j < 64; j++) {		for (j = 0; j < 64; j++) {
	if (!test_bit(j, &present))		if (!test_bit(j, &present))
	continue;		continue;
	uv_blade_info[blade].pnode = (i * 64 + j);		pnode = (i * 64 + j);
			uv_blade_info[blade].pnode = pnode;
	uv_blade_info[blade].nr_possible_cpus = 0;		uv_blade_info[blade].nr_possible_cpus = 0;
	uv_blade_info[blade].nr_online_cpus = 0;		uv_blade_info[blade].nr_online_cpus = 0;
			max_pnode = max(pnode, max_pnode);
	blade++;		blade++;
	}		}
	}		}
	@@ -738,7 +740,6 @@ void __init uv_system_init(void)
	uv_cpu_hub_info(cpu)->scir.offset = uv_scir_offset(apicid);		uv_cpu_hub_info(cpu)->scir.offset = uv_scir_offset(apicid);
	uv_node_to_blade[nid] = blade;		uv_node_to_blade[nid] = blade;
	uv_cpu_to_blade[cpu] = blade;		uv_cpu_to_blade[cpu] = blade;
	max_pnode = max(pnode, max_pnode);
	}		}

	/* Add blade/pnode info for nodes without cpus */		/* Add blade/pnode info for nodes without cpus */
	@@ -750,7 +751,6 @@ void __init uv_system_init(void)
	pnode = (paddr >> m_val) & pnode_mask;		pnode = (paddr >> m_val) & pnode_mask;
	blade = boot_pnode_to_blade(pnode);		blade = boot_pnode_to_blade(pnode);
	uv_node_to_blade[nid] = blade;		uv_node_to_blade[nid] = blade;
	max_pnode = max(pnode, max_pnode);
	}		}

	map_gru_high(max_pnode);		map_gru_high(max_pnode);

arch/x86/kernel/early-quirks.c

+0 −18

Original line number	Original line	Diff line number	Diff line
	@@ -18,7 +18,6 @@
	#include <asm/apic.h>		#include <asm/apic.h>
	#include <asm/iommu.h>		#include <asm/iommu.h>
	#include <asm/gart.h>		#include <asm/gart.h>
	#include <asm/hpet.h>

	static void __init fix_hypertransport_config(int num, int slot, int func)		static void __init fix_hypertransport_config(int num, int slot, int func)
	{		{
	@@ -192,21 +191,6 @@ static void __init ati_bugs_contd(int num, int slot, int func)
	}		}
	#endif		#endif

	/*
	* Force the read back of the CMP register in hpet_next_event()
	* to work around the problem that the CMP register write seems to be
	* delayed. See hpet_next_event() for details.
	*
	* We do this on all SMBUS incarnations for now until we have more
	* information about the affected chipsets.
	*/
	static void __init ati_hpet_bugs(int num, int slot, int func)
	{
	#ifdef CONFIG_HPET_TIMER
	hpet_readback_cmp = 1;
	#endif
	}

	#define QFLAG_APPLY_ONCE 0x1		#define QFLAG_APPLY_ONCE 0x1
	#define QFLAG_APPLIED 0x2		#define QFLAG_APPLIED 0x2
	#define QFLAG_DONE (QFLAG_APPLY_ONCE\|QFLAG_APPLIED)		#define QFLAG_DONE (QFLAG_APPLY_ONCE\|QFLAG_APPLIED)
	@@ -236,8 +220,6 @@ static struct chipset early_qrk[] __initdata = {
	PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs },		PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs },
	{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,		{ PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS,
	PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },		PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_bugs_contd },
	{ PCI_VENDOR_ID_ATI, PCI_ANY_ID,
	PCI_CLASS_SERIAL_SMBUS, PCI_ANY_ID, 0, ati_hpet_bugs },
	{}		{}
	};		};