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Commit a51c726e authored by Sujeev Dias's avatar Sujeev Dias
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mhi: cntrl: qcom: do not cache PCIe endpoint config space 



We do not need to save a reference config space since PCIe
framework will automatically restore necessary config space
during re-init.

CRs-Fixed: 2454278
Change-Id: I2d0e82cb5c0c4e12cd3714f79cf23fda148b632d
Signed-off-by: default avatarSujeev Dias <sdias@codeaurora.org>
parent f695b496

drivers/bus/mhi/controllers/mhi_arch_qcom.c

+0 −6
Original line number Diff line number Diff line
@@ -35,7 +35,6 @@ struct arch_info { 
	u32 bus_client;

	struct msm_pcie_register_event pcie_reg_event;

	struct pci_saved_state *pcie_state;

	struct pci_saved_state *ref_pcie_state;

	struct dma_iommu_mapping *mapping;

	async_cookie_t cookie;

	void *boot_ipc_log;
@@ -108,7 +107,6 @@ static int mhi_arch_esoc_ops_power_on(void *priv, unsigned int flags) 
	struct mhi_controller *mhi_cntrl = priv;

	struct mhi_dev *mhi_dev = mhi_controller_get_devdata(mhi_cntrl);

	struct pci_dev *pci_dev = mhi_dev->pci_dev;

	struct arch_info *arch_info = mhi_dev->arch_info;

	int ret;



	mutex_lock(&mhi_cntrl->pm_mutex);
@@ -138,7 +136,6 @@ static int mhi_arch_esoc_ops_power_on(void *priv, unsigned int flags) 
		MHI_ERR("Failed to resume pcie bus ret %d\n", ret);

		return ret;

	}

	pci_load_saved_state(pci_dev, arch_info->ref_pcie_state);



	return mhi_pci_probe(pci_dev, NULL);

}
@@ -442,9 +439,6 @@ int mhi_arch_pcie_init(struct mhi_controller *mhi_cntrl) 
				MHI_ERR("Failed to register esoc ops\n");

		}



		/* save reference state for pcie config space */

		arch_info->ref_pcie_state = pci_store_saved_state(

							mhi_dev->pci_dev);

		/*

		 * MHI host driver has full autonomy to manage power state.

		 * Disable all automatic power collapse features