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Commit a4feaf4e authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nva3/disp: move hda codec handling to core 



Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent f7960736

drivers/gpu/drm/nouveau/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -138,6 +138,7 @@ nouveau-y += core/engine/disp/nva3.o 
nouveau-y += core/engine/disp/nvd0.o

nouveau-y += core/engine/disp/nve0.o

nouveau-y += core/engine/disp/dacnv50.o

nouveau-y += core/engine/disp/hdanva3.o

nouveau-y += core/engine/disp/hdanvd0.o

nouveau-y += core/engine/disp/hdminvd0.o

nouveau-y += core/engine/disp/sornv50.o

drivers/gpu/drm/nouveau/core/engine/disp/hdanva3.c

0 → 100644
+48 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2012 Red Hat Inc.

 *

 * Permission is hereby granted, free of charge, to any person obtaining a

 * copy of this software and associated documentation files (the "Software"),

 * to deal in the Software without restriction, including without limitation

 * the rights to use, copy, modify, merge, publish, distribute, sublicense,

 * and/or sell copies of the Software, and to permit persons to whom the

 * Software is furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL

 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR

 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,

 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR

 * OTHER DEALINGS IN THE SOFTWARE.

 *

 * Authors: Ben Skeggs

 */



#include <core/os.h>

#include <core/class.h>



#include "nv50.h"



int

nva3_hda_eld(struct nv50_disp_priv *priv, int or, u8 *data, u32 size)

{

	const u32 soff = (or * 0x800);

	int i;



	if (data && data[0]) {

		for (i = 0; i < size; i++)

			nv_wr32(priv, 0x61c440 + soff, (i << 8) | data[i]);

		nv_mask(priv, 0x61c448 + soff, 0x80000003, 0x80000003);

	} else

	if (data) {

		nv_mask(priv, 0x61c448 + soff, 0x80000003, 0x80000001);

	} else {

		nv_mask(priv, 0x61c448 + soff, 0x80000003, 0x80000000);

	}



	return 0;

}

drivers/gpu/drm/nouveau/core/engine/disp/nv50.h

+5 −4
Original line number Diff line number Diff line
@@ -46,6 +46,11 @@ int nv50_dac_sense(struct nv50_disp_priv *, int, u32); 


#define SOR_MTHD(n) (n), (n) + 0x3f



int nva3_hda_eld(struct nv50_disp_priv *, int, u8 *, u32);

int nvd0_hda_eld(struct nv50_disp_priv *, int, u8 *, u32);



int nvd0_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32);



int nv50_sor_mthd(struct nouveau_object *, u32, void *, u32);

int nv50_sor_power(struct nv50_disp_priv *, int, u32);
@@ -56,10 +61,6 @@ int nv94_sor_dp_lnkctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32, 
int nv94_sor_dp_drvctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,

		       struct dcb_output *);



int nvd0_hda_eld(struct nv50_disp_priv *, int, u8 *, u32);



int nvd0_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32);



int nvd0_sor_dp_train(struct nv50_disp_priv *, int, int, u16, u16, u32,

		      struct dcb_output *);

int nvd0_sor_dp_lnkctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32,

drivers/gpu/drm/nouveau/core/engine/disp/nva3.c

+1 −0
Original line number Diff line number Diff line
@@ -85,6 +85,7 @@ nva3_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, 
	priv->dac.power = nv50_dac_power;

	priv->dac.sense = nv50_dac_sense;

	priv->sor.power = nv50_sor_power;

	priv->sor.hda_eld = nva3_hda_eld;

	priv->sor.dp_train = nv94_sor_dp_train;

	priv->sor.dp_lnkctl = nv94_sor_dp_lnkctl;

	priv->sor.dp_drvctl = nv94_sor_dp_drvctl;

drivers/gpu/drm/nouveau/nouveau_hdmi.c

+11 −16
Original line number Diff line number Diff line
@@ -28,6 +28,10 @@ 
#include "nouveau_encoder.h"

#include "nouveau_crtc.h"



#include <core/class.h>



#include "nv50_display.h"



static bool

hdmi_sor(struct drm_encoder *encoder)

{
@@ -74,23 +78,21 @@ hdmi_mask(struct drm_encoder *encoder, u32 reg, u32 mask, u32 val) 
static void

nouveau_audio_disconnect(struct drm_encoder *encoder)

{

	struct nv50_display *priv = nv50_display(encoder->dev);

	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);

	struct nouveau_device *device = nouveau_dev(encoder->dev);

	u32 or = nv_encoder->or * 0x800;

	u32 or = nv_encoder->or;



	if (hdmi_sor(encoder))

		nv_mask(device, 0x61c448 + or, 0x00000003, 0x00000000);

		nv_exec(priv->core, NVA3_DISP_SOR_HDA_ELD + or, NULL, 0);

}



static void

nouveau_audio_mode_set(struct drm_encoder *encoder,

		       struct drm_display_mode *mode)

{

	struct nv50_display *priv = nv50_display(encoder->dev);

	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);

	struct nouveau_device *device = nouveau_dev(encoder->dev);

	struct nouveau_connector *nv_connector;

	u32 or = nv_encoder->or * 0x800;

	int i;



	nv_connector = nouveau_encoder_connector_get(nv_encoder);

	if (!drm_detect_monitor_audio(nv_connector->edid)) {
@@ -99,17 +101,10 @@ nouveau_audio_mode_set(struct drm_encoder *encoder, 
	}



	if (hdmi_sor(encoder)) {

		nv_mask(device, 0x61c448 + or, 0x00000001, 0x00000001);



		drm_edid_to_eld(&nv_connector->base, nv_connector->edid);

		if (nv_connector->base.eld[0]) {

			u8 *eld = nv_connector->base.eld;

			for (i = 0; i < eld[2] * 4; i++)

				nv_wr32(device, 0x61c440 + or, (i << 8) | eld[i]);

			for (i = eld[2] * 4; i < 0x60; i++)

				nv_wr32(device, 0x61c440 + or, (i << 8) | 0x00);

			nv_mask(device, 0x61c448 + or, 0x00000002, 0x00000002);

		}

		nv_exec(priv->core, NVA3_DISP_SOR_HDA_ELD + nv_encoder->or,

				    nv_connector->base.eld,

				    nv_connector->base.eld[2] * 4);

	}

}