Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a4dc61f5 authored by Huang Rui's avatar Huang Rui Committed by Alex Deucher
Browse files

drm/amdgpu: add gfx clock gating for raven 



Signed-off-by: default avatarHuang Rui <ray.huang@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 5cf7433d

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+2 −0
Original line number Diff line number Diff line
@@ -2877,6 +2877,7 @@ static int gfx_v9_0_set_clockgating_state(void *handle, 


	switch (adev->asic_type) {

	case CHIP_VEGA10:

	case CHIP_RAVEN:

		gfx_v9_0_update_gfx_clock_gating(adev,

						 state == AMD_CG_STATE_GATE ? true : false);

		break;
@@ -3736,6 +3737,7 @@ static void gfx_v9_0_set_rlc_funcs(struct amdgpu_device *adev) 
{

	switch (adev->asic_type) {

	case CHIP_VEGA10:

	case CHIP_RAVEN:

		adev->gfx.rlc.funcs = &gfx_v9_0_rlc_funcs;

		break;

	default: