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Commit a4731caf authored by Archit Saxena's avatar Archit Saxena
Browse files

ARM: dts: msm: Add device tree support for SSRD variant 



Add device tree files for SSRD variant of qcs403.

Change-Id: Icd85ab057cf0aa940329690314be5ad4eb54f347
Signed-off-by: default avatarArchit Saxena <archsaxe@codeaurora.org>
parent 12165278

arch/arm64/boot/dts/qcom/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -21,7 +21,8 @@ dtb-$(CONFIG_ARCH_QCS405) += qcs405-rumi.dtb \ 
else

dtb-$(CONFIG_ARCH_QCS405) += qcs403-iot-sku1.dtb \

			qcs403-iot-sku2.dtb \

			qcs403-iot-sku3.dtb

			qcs403-iot-sku3.dtb \

			qcs403-iot-sku4.dtb

endif



ifeq ($(CONFIG_BUILD_ARM64_DT_OVERLAY),y)

arch/arm64/boot/dts/qcom/qcs403-iot-sku4.dts

0 → 100644
+81 −0
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



/dts-v1/;



#include "qcs403.dtsi"

/ {

	model = "Qualcomm Technologies, Inc. QCS403 SSRD IOT AUDIO PLL";

	compatible = "qcom,qcs403-iot", "qcom,qcs403", "qcom,iot";

	qcom,board-id = <0x010020 0x5>;



	cpus {

		/delete-node/ cpu@102;

		/delete-node/ cpu@103;



		cpu-map {

			cluster0 {

				/delete-node/ core2;

				/delete-node/ core3;

			};

		};

	};

};



&soc {

	cpuss_dump {

		/delete-node/ qcom,l1_i_cache102;

		/delete-node/ qcom,l1_i_cache103;

		/delete-node/ qcom,l1_d_cache102;

		/delete-node/ qcom,l1_d_cache103;

	};



	qcom,spm@b012000 {

		qcom,cpu-vctl-list = <&CPU0 &CPU1>;

	};



	qcom,lpm-levels {

		qcom,pm-cluster@0{

			qcom,pm-cpu {

				qcom,cpu = <&CPU0 &CPU1>;

			};

		};

	};



	/delete-node/ cti@61ba000;

	/delete-node/ cti@61bb000;

	/delete-node/ etm@61be000;

	/delete-node/ etm@61bf000;

	funnel@61a1000 {

		ports {

			/delete-node/ port@3;

			/delete-node/ port@4;

		};

	};

};



&thermal_zones {

	cpuss-max-step {

		cooling-maps {

			/delete-node/ cpu2_cdev;

			/delete-node/ cpu3_cdev;

		};

	};



	/delete-node/ cpuss-2-step;

	/delete-node/ cpuss-3-step;

};



&qnand_1 {

	status = "ok";

};