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Commit a366d39d authored by Saranya Chidura's avatar Saranya Chidura Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Enable force dump on qcs405 



Enable ETB/ETR register force dump on QCS405.

Change-Id: Iba1bc26d56b52a33b493053bbeae0a4de43d8030
Signed-off-by: default avatarSaranya Chidura <schidura@codeaurora.org>
parent c53ff08b

arch/arm64/boot/dts/qcom/qcs405-coresight.dtsi

+3 −0
Original line number Diff line number Diff line
@@ -70,6 +70,7 @@ 
		reg-names = "tmc-base", "bam-base";



		arm,buffer-size = <0x400000>;

		qcom,force-reg-dump;



		coresight-name = "coresight-tmc-etr";

		coresight-ctis = <&cti0 &cti0>;
@@ -100,6 +101,8 @@ 
		coresight-name = "coresight-tmc-etf";

		coresight-ctis = <&cti0 &cti0>;

		arm,default-sink;

		qcom,force-reg-dump;



		coresight-csr = <&csr>;



		clocks = <&clock_rpmcc RPM_QDSS_CLK>,