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Commit a349fc21 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge changes I90a7aba0,I8674c2fc into dev/msm-4.14-display 

* changes:
  drm/msm/sde: allow PM_QOS vote for all command mode panels
  ARM: dts: msm: add dsi secondary node for SM8150
parents d36fcdf8 4b2f638d

arch/arm64/boot/dts/qcom/sm8150-pinctrl.dtsi

+51 −0
Original line number Diff line number Diff line
@@ -3429,6 +3429,31 @@ 
					bias-pull-down;         /* PULL DOWN */

				};

			};



			sde_dsi1_active: sde_dsi1_active {

				mux {

					pins = "gpio130";

					function = "gpio";

				};



				config {

					pins = "gpio130";

					drive-strength = <8>;   /* 8 mA */

					bias-disable = <0>;   /* no pull */

				};

			};

			sde_dsi1_suspend: sde_dsi1_suspend {

				mux {

					pins = "gpio130";

					function = "gpio";

				};



				config {

					pins = "gpio130";

					drive-strength = <2>;   /* 2 mA */

					bias-pull-down;         /* PULL DOWN */

				};

			};

		};



		pmx_sde_te {
@@ -3457,6 +3482,32 @@ 
					bias-pull-down;         /* PULL DOWN */

				};

			};



			sde_te1_active: sde_te1_active {

				mux {

					pins = "gpio9";

					function = "mdp_vsync";

				};



				config {

					pins = "gpio9";

					drive-strength = <2>;   /* 2 mA */

					bias-pull-down;         /* PULL DOWN */

				};

			};



			sde_te1_suspend: sde_te1_suspend {

				mux {

					pins = "gpio9";

					function = "mdp_vsync";

				};



				config {

					pins = "gpio9";

					drive-strength = <2>;   /* 2 mA */

					bias-pull-down;         /* PULL DOWN */

				};

			};

		};



		/* add pins for DisplayPort */

arch/arm64/boot/dts/qcom/sm8150-sde-display.dtsi

+33 −2
Original line number Diff line number Diff line
@@ -345,8 +345,9 @@ 
		qcom,dsi-panel = <&dsi_sw43404_amoled_fhd_plus_cmd>;

	};



	sde_dsi: qcom,dsi-display {

	sde_dsi: qcom,dsi-display-primary {

		compatible = "qcom,dsi-display";

		label = "primary";



		qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;

		qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;
@@ -391,6 +392,36 @@ 
			&dsi_sw43404_amoled_fhd_plus_cmd_display>;

	};



	sde_dsi1: qcom,dsi-display-secondary {

		compatible = "qcom,dsi-display";

		label = "secondary";



		qcom,dsi-ctrl = <&mdss_dsi0 &mdss_dsi1>;

		qcom,dsi-phy = <&mdss_dsi_phy0 &mdss_dsi_phy1>;



		clocks = <&mdss_dsi0_pll BYTECLK_MUX_0_CLK>,

			 <&mdss_dsi0_pll PCLK_MUX_0_CLK>,

			 <&mdss_dsi1_pll BYTECLK_MUX_1_CLK>,

			 <&mdss_dsi1_pll PCLK_MUX_1_CLK>;

		clock-names = "src_byte_clk0", "src_pixel_clk0",

			      "src_byte_clk1", "src_pixel_clk1";



		pinctrl-names = "panel_active", "panel_suspend";

		pinctrl-0 = <&sde_dsi1_active &sde_te1_active>;

		pinctrl-1 = <&sde_dsi1_suspend &sde_te1_suspend>;



		qcom,platform-te-gpio = <&tlmm 9 0>;



		vddio-supply = <&pm8150_l14>;

		lab-supply = <&lcdb_ldo_vreg>;

		ibb-supply = <&lcdb_ncp_vreg>;

		vdd-supply = <&display_panel_avdd_eldo>;



		qcom,dsi-display-list =

			<&dsi_nt35695b_truly_fhd_cmd_display

			&dsi_nt35695b_truly_fhd_video_display>;

	};



	sde_wb: qcom,wb-display@0 {

		compatible = "qcom,wb-display";

		cell-index = <0>;
@@ -421,7 +452,7 @@ 
};



&mdss_mdp {

	connectors = <&sde_rscc &sde_wb &sde_dp &sde_dsi>;

	connectors = <&sde_rscc &sde_wb &sde_dp &sde_dsi &sde_dsi1>;

};



/* PHY TIMINGS REVISION T */

drivers/gpu/drm/msm/sde/sde_encoder.c

+2 −2
Original line number Diff line number Diff line
@@ -2054,11 +2054,11 @@ static int _sde_encoder_resource_control_helper(struct drm_encoder *drm_enc, 
		/* enable all the irq */

		_sde_encoder_irq_control(drm_enc, true);



		if (is_cmd_mode && is_primary)

		if (is_cmd_mode)

			_sde_encoder_pm_qos_add_request(drm_enc);



	} else {

		if (is_cmd_mode && is_primary)

		if (is_cmd_mode)

			_sde_encoder_pm_qos_remove_request(drm_enc);



		/* disable all the irq */