Merge "soc: qcom: dcc_v2: Add snapshot of the DCC v2 driver" into msm-next

* Data Capture and Compare (DCC)

DCC (Data Capture and Compare) is a DMA engine, which is used to save

configuration data or system memory contents during catastrophic failure or

SW trigger.

It can also perform CRC over the same configuration or memory space.

Required properties:

- compatible : name of the component used for driver matching, should be

	       "qcom,dcc" or "qcom,dcc_v2"

- reg : physical base address and length of the register set(s), SRAM and XPU

	of the component.

- reg-names : names corresponding to each reg property value.

	      dcc-base: Base address for DCC configuration reg

	      dcc-ram-base: Start of HLOS address space in SRAM

	      dcc-xpu-base: Base address for XPU configuration reg

- dcc-ram-offset: Address offset from the start of the SRAM address space.

Optional properties:

- clocks: phandle reference to the parent clock.

- clock-names: Name of the clock that needs to be enabled for the HW to run.

	       Turned off when the subsystem is disabled.

- qcom,save-reg: boolean, To save dcc registers state in memory after dcc

		 enable and disable

- qcom,data-sink: string, To specify default data sink for dcc, should be one

		  of the following:

		  "atb"	  : To send captured data over ATB to a trace sink

		  "sram"  : To save captured data in dcc internal SRAM.

Example:

	dcc: dcc@4b3000 {

		compatible = "qcom,dcc";

		reg = <0x4b3000 0x1000>,

		      <0x4b4000 0x2000>,

		      <0x4b0000 0x1>;

		reg-names = "dcc-base", "dcc-ram-base", "dcc-xpu-base";

		clocks = <&clock_gcc clk_gcc_dcc_ahb_clk>;

		clock-names = "dcc_clk";

		qcom,save-reg;

	};

         for hang. By using sysfs entries core hang detection can be

	 enabled or disabled dynamically.

config QCOM_DCC_V2

       bool "Qualcomm Technologies Data Capture and Compare enigne support for V2"

       help

         This option enables driver for Data Capture and Compare engine. DCC

         driver provides interface to configure DCC block and read back

         captured data from DCC's internal SRAM.

config MSM_GLADIATOR_HANG_DETECT

	tristate "MSM Gladiator Hang Detection Support"

	help

obj-$(CONFIG_SOC_BUS) += socinfo.o

obj-$(CONFIG_MSM_BOOT_STATS) += boot_stats.o

obj-$(CONFIG_MSM_CORE_HANG_DETECT) += core_hang_detect.o

obj-$(CONFIG_QCOM_DCC_V2) += dcc_v2.o

obj-$(CONFIG_MSM_GLADIATOR_HANG_DETECT) += gladiator_hang_detect.o

obj-$(CONFIG_MSM_GLADIATOR_ERP) += gladiator_erp.o

obj-$(CONFIG_QCOM_SECURE_BUFFER) += secure_buffer.o