Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a0772087 authored by Siva Kumar Akkireddi's avatar Siva Kumar Akkireddi Committed by Siddartha Mohanadoss
Browse files

msm: ep_pcie: Save and restore the pcie subsystem id register 



The subsystem id register is initialized by PBL if bios-locking
is enabled. The end-point driver reads and saves the register
value, and restores it during resume from low-power state. This
is needed for proper functioning of hibernate/resume.

Change-Id: I2175780e02357fde0b2ce3bb491a2140af85570e
Signed-off-by: default avatarSiva Kumar Akkireddi <sivaa@codeaurora.org>
parent f814cc95

drivers/platform/msm/ep_pcie/ep_pcie_com.h

+1 −0
Original line number Diff line number Diff line
@@ -338,6 +338,7 @@ struct ep_pcie_dev_t { 
	u32                          bus_client;

	u16                          vendor_id;

	u16                          device_id;

	u32                          subsystem_id;

	u32                          link_speed;

	bool                         active_config;

	bool                         aggregated_irq;

drivers/platform/msm/ep_pcie/ep_pcie_core.c

+10 −1
Original line number Diff line number Diff line
@@ -740,7 +740,9 @@ static void ep_pcie_core_init(struct ep_pcie_dev_t *dev, bool configured) 
		ep_pcie_write_reg(dev->dm_core, PCIE20_BIST_HDR_TYPE, 0x10);



		/* Set Subsystem ID and Subsystem Vendor ID */

		ep_pcie_write_reg(dev->dm_core, PCIE20_SUBSYSTEM, 0xa01f17cb);

		if (ep_pcie_dev.subsystem_id)

			ep_pcie_write_reg(dev->dm_core, PCIE20_SUBSYSTEM,

					ep_pcie_dev.subsystem_id);



		/* Set the PMC Register - to support PME in D0/D3hot/D3cold */

		ep_pcie_write_mask(dev->dm_core + PCIE20_CAP_ID_NXT_PTR, 0,
@@ -1423,6 +1425,13 @@ int ep_pcie_core_enable_endpoint(enum ep_pcie_options opt) 
				EP_PCIE_INFO(dev,

					"PCIe V%d: link initialized by bootloader for LE PCIe endpoint; skip link training in HLOS.\n",

					dev->rev);

				/*

				 * Read and save the subsystem id set in PBL

				 * (needed for restore during D3->D0)

				 */

				ep_pcie_dev.subsystem_id =

					readl_relaxed(dev->dm_core +

							PCIE20_SUBSYSTEM);

				/*

				 * Skip mhi mmio config for host reboot case

				 * with bios-locking enabled.