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Commit a040f22d authored by Guennadi Liakhovetski's avatar Guennadi Liakhovetski Committed by Simon Horman
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ARM: shmobile: r8a73a4: add Z2 clock support 



The Z2 clock on r8a73a4 is used to clock the 4 Cortex A7 cores on the SoC.
Add a definition for this clock to later use it from the arm_big_little
CPUFreq driver.

Signed-off-by: default avatarGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com>
Acked-by: default avatarKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent d1c3c959

arch/arm/mach-shmobile/clock-r8a73a4.c

+17 −0
Original line number Original line Diff line number Diff line
@@ -323,6 +323,21 @@ static struct clk z_clk = { 
	.ops = &zclk_ops,

	.ops = &zclk_ops,

};

};





/*

 * It seems only 1/2 divider is usable in manual mode. 1/2 / 2/3

 * switching is only available in auto-DVFS mode

 */

SH_FIXED_RATIO_CLK(pll0_div2_clk,	pll0_clk,		div2);



static struct clk z2_clk = {

	.parent = &pll0_div2_clk,

	.div_mask = 0x1f,

	.enable_bit = 0,

	/* We'll need to access FRQCRB and FRQCRC */

	.enable_reg = (void __iomem *)FRQCRB,

	.ops = &zclk_ops,

};



static struct clk *main_clks[] = {

static struct clk *main_clks[] = {

	&extalr_clk,

	&extalr_clk,

	&extal1_clk,

	&extal1_clk,
@@ -341,6 +356,8 @@ static struct clk *main_clks[] = { 
	&pll2s_clk,

	&pll2s_clk,

	&pll2h_clk,

	&pll2h_clk,

	&z_clk,

	&z_clk,

	&pll0_div2_clk,

	&z2_clk,

};

};





/* DIV4 */

/* DIV4 */