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Commit 9fe2e9d6 authored by David Daney's avatar David Daney Committed by Ralf Baechle
Browse files

MIPS: Add accessor functions and bit definitions for c0_PageGrain 



Signed-off-by: default avatarDavid Daney <ddaney@caviumnetworks.com>
To: linux-mips@linux-mips.org
Patchwork: http://patchwork.linux-mips.org/patch/950/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 9b8c3891

arch/mips/include/asm/mipsregs.h

+11 −0
Original line number Diff line number Diff line
@@ -250,6 +250,14 @@ 
#define PL_64M		26

#define PL_256M		28



/*

 * PageGrain bits

 */

#define PG_RIE		(_ULCAST_(1) <<  31)

#define PG_XIE		(_ULCAST_(1) <<  30)

#define PG_ELPA		(_ULCAST_(1) <<  29)

#define PG_ESP		(_ULCAST_(1) <<  28)



/*

 * R4x00 interrupt enable / cause bits

 */
@@ -830,6 +838,9 @@ do { \ 
#define read_c0_pagemask()	__read_32bit_c0_register($5, 0)

#define write_c0_pagemask(val)	__write_32bit_c0_register($5, 0, val)



#define read_c0_pagegrain()	__read_32bit_c0_register($5, 1)

#define write_c0_pagegrain(val)	__write_32bit_c0_register($5, 1, val)



#define read_c0_wired()		__read_32bit_c0_register($6, 0)

#define write_c0_wired(val)	__write_32bit_c0_register($6, 0, val)