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Commit 9ed3689b authored by Linus Torvalds's avatar Linus Torvalds
Browse files
* 'next' of git://git.monstr.eu/linux-2.6-microblaze:
  microblaze: Do not show error message for 32 interrupt lines
  Revert "microblaze: PCI fix typo fault in of_node pointer moving into pci_bus"
  microblaze: PCI fix typo fault in of_node pointer moving into pci_bus
  microblaze: Add support for early console on mdm
  microblaze: Simplify early console binding from DT
  microblaze: Get early printk console earlier
  microblaze: Standardise cpuinfo output for cache policy
  microblaze: Unprivileged stream instruction awareness
  microblaze: trivial: Fix typo fault
  microblaze: exec: Remove redundant set_fs(USER_DS)
  microblaze: Remove duplicated prototype of start_thread()
  microblaze: Fix unaligned value saving to the stack for system with MMU
  microblaze/irqs: Do not trace arch_local_{*,irq_*} functions
parents 8aae36cd 36392294
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+1 −0
Original line number Diff line number Diff line
@@ -38,6 +38,7 @@ struct cpuinfo {
	u32 use_exc;
	u32 ver_code;
	u32 mmu;
	u32 mmu_privins;
	u32 endian;

	/* CPU caches */
+10 −10
Original line number Diff line number Diff line
@@ -14,7 +14,7 @@

#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR

static inline unsigned long arch_local_irq_save(void)
static inline notrace unsigned long arch_local_irq_save(void)
{
	unsigned long flags;
	asm volatile("	msrclr %0, %1	\n"
@@ -25,7 +25,7 @@ static inline unsigned long arch_local_irq_save(void)
	return flags;
}

static inline void arch_local_irq_disable(void)
static inline notrace void arch_local_irq_disable(void)
{
	/* this uses r0 without declaring it - is that correct? */
	asm volatile("	msrclr r0, %0	\n"
@@ -35,7 +35,7 @@ static inline void arch_local_irq_disable(void)
		     : "memory");
}

static inline void arch_local_irq_enable(void)
static inline notrace void arch_local_irq_enable(void)
{
	/* this uses r0 without declaring it - is that correct? */
	asm volatile("	msrset	r0, %0	\n"
@@ -47,7 +47,7 @@ static inline void arch_local_irq_enable(void)

#else /* !CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */

static inline unsigned long arch_local_irq_save(void)
static inline notrace unsigned long arch_local_irq_save(void)
{
	unsigned long flags, tmp;
	asm volatile ("	mfs	%0, rmsr	\n"
@@ -61,7 +61,7 @@ static inline unsigned long arch_local_irq_save(void)
	return flags;
}

static inline void arch_local_irq_disable(void)
static inline notrace void arch_local_irq_disable(void)
{
	unsigned long tmp;
	asm volatile("	mfs	%0, rmsr	\n"
@@ -74,7 +74,7 @@ static inline void arch_local_irq_disable(void)
		     : "memory");
}

static inline void arch_local_irq_enable(void)
static inline notrace void arch_local_irq_enable(void)
{
	unsigned long tmp;
	asm volatile("	mfs	%0, rmsr	\n"
@@ -89,7 +89,7 @@ static inline void arch_local_irq_enable(void)

#endif /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */

static inline unsigned long arch_local_save_flags(void)
static inline notrace unsigned long arch_local_save_flags(void)
{
	unsigned long flags;
	asm volatile("	mfs	%0, rmsr	\n"
@@ -100,7 +100,7 @@ static inline unsigned long arch_local_save_flags(void)
	return flags;
}

static inline void arch_local_irq_restore(unsigned long flags)
static inline notrace void arch_local_irq_restore(unsigned long flags)
{
	asm volatile("	mts	rmsr, %0	\n"
		     "	nop			\n"
@@ -109,12 +109,12 @@ static inline void arch_local_irq_restore(unsigned long flags)
		     : "memory");
}

static inline bool arch_irqs_disabled_flags(unsigned long flags)
static inline notrace bool arch_irqs_disabled_flags(unsigned long flags)
{
	return (flags & MSR_IE) == 0;
}

static inline bool arch_irqs_disabled(void)
static inline notrace bool arch_irqs_disabled(void)
{
	return arch_irqs_disabled_flags(arch_local_save_flags());
}
+0 −3
Original line number Diff line number Diff line
@@ -125,9 +125,6 @@ struct thread_struct {
	.pgdir = swapper_pg_dir, \
}

/* Do necessary setup to start up a newly executed thread.  */
void start_thread(struct pt_regs *regs,
		unsigned long pc, unsigned long usp);

/* Free all resources held by a thread. */
extern inline void release_thread(struct task_struct *dead_task)
+6 −2
Original line number Diff line number Diff line
@@ -26,8 +26,12 @@
#define HAVE_ARCH_DEVTREE_FIXUPS

/* Other Prototypes */
extern int early_uartlite_console(void);
extern int early_uart16550_console(void);
enum early_consoles {
	UARTLITE = 1,
	UART16550 = 2,
};

extern int of_early_console(void *version);

/*
 * OF address retreival & translation
+3 −2
Original line number Diff line number Diff line
@@ -111,16 +111,16 @@ struct pvr_s {
/* Target family PVR mask */
#define PVR10_TARGET_FAMILY_MASK	0xFF000000

/* MMU descrtiption */
/* MMU description */
#define PVR11_USE_MMU			0xC0000000
#define PVR11_MMU_ITLB_SIZE		0x38000000
#define PVR11_MMU_DTLB_SIZE		0x07000000
#define PVR11_MMU_TLB_ACCESS		0x00C00000
#define PVR11_MMU_ZONES			0x003C0000
#define PVR11_MMU_PRIVINS		0x00010000
/* MSR Reset value PVR mask */
#define PVR11_MSR_RESET_VALUE_MASK	0x000007FF


/* PVR access macros */
#define PVR_IS_FULL(_pvr)	(_pvr.pvr[0] & PVR0_PVR_FULL_MASK)
#define PVR_USE_BARREL(_pvr)	(_pvr.pvr[0] & PVR0_USE_BARREL_MASK)
@@ -216,6 +216,7 @@ struct pvr_s {
#define PVR_MMU_DTLB_SIZE(_pvr)		(_pvr.pvr[11] & PVR11_MMU_DTLB_SIZE)
#define PVR_MMU_TLB_ACCESS(_pvr)	(_pvr.pvr[11] & PVR11_MMU_TLB_ACCESS)
#define PVR_MMU_ZONES(_pvr)		(_pvr.pvr[11] & PVR11_MMU_ZONES)
#define PVR_MMU_PRIVINS(pvr)		(pvr.pvr[11] & PVR11_MMU_PRIVINS)

/* endian */
#define PVR_ENDIAN(_pvr)	(_pvr.pvr[0] & PVR0_ENDI)
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