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Commit 9e518b29 authored by Guru Das Srinagesh's avatar Guru Das Srinagesh Committed by Divya Sharma
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power: smb5: Prevent interrupt storm due to incorrect configuration 



Commit 'f721be6a ("power: smb5: Advertise low battery in Type-C
Source mode")' changed the method of configuration of the
TYPE_C_INTERRUPT_EN_CFG_2 register from simple write to masked write.
This inadvertently led to the enabling of non-required interrupts and,
consequently, an interrupt storm.

Fix this by reverting to simple write.

Change-Id: I30e76c28b86e29eb40b1b73b29e1c77d8c73b29c
Signed-off-by: default avatarGuru Das Srinagesh <gurus@codeaurora.org>
parent 1c087f09

drivers/power/supply/qcom/qpnp-smb5.c

+4 −4
Original line number Diff line number Diff line
@@ -1555,6 +1555,7 @@ static int smb5_configure_typec(struct smb_charger *chg) 
		return rc;

	}



	/* Use simple write to enable only required interrupts */

	rc = smblib_write(chg, TYPE_C_INTERRUPT_EN_CFG_1_REG,

				TYPEC_CCOUT_DETACH_INT_EN_BIT |

				TYPEC_CCOUT_ATTACH_INT_EN_BIT);
@@ -1564,11 +1565,10 @@ static int smb5_configure_typec(struct smb_charger *chg) 
		return rc;

	}



	rc = smblib_masked_write(chg, TYPE_C_INTERRUPT_EN_CFG_2_REG,

	/* Use simple write to enable only required interrupts */

	rc = smblib_write(chg, TYPE_C_INTERRUPT_EN_CFG_2_REG,

				TYPEC_SRC_BATT_HPWR_INT_EN_BIT |

				TYPEC_WATER_DETECTION_INT_EN_BIT,

				TYPEC_SRC_BATT_HPWR_INT_EN_BIT

				| TYPEC_WATER_DETECTION_INT_EN_BIT);

				TYPEC_WATER_DETECTION_INT_EN_BIT);

	if (rc < 0) {

		dev_err(chg->dev,

			"Couldn't configure Type-C interrupts rc=%d\n", rc);