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Commit 9e18ad98 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'pci/ptm' into next 

* pci/ptm:
  PCI: Add PTM clock granularity information
  PCI: Add pci_enable_ptm() for drivers to enable PTM on endpoints
  PCI: Add Precision Time Measurement (PTM) support
parents a4589a66 8b2ec318

drivers/pci/pci.h

+6 −0
Original line number Diff line number Diff line
@@ -332,6 +332,12 @@ static inline resource_size_t pci_resource_alignment(struct pci_dev *dev, 


void pci_enable_acs(struct pci_dev *dev);



#ifdef CONFIG_PCIE_PTM

void pci_ptm_init(struct pci_dev *dev);

#else

static inline void pci_ptm_init(struct pci_dev *dev) { }

#endif



struct pci_dev_reset_methods {

	u16 vendor;

	u16 device;

drivers/pci/pcie/Kconfig

+11 −0
Original line number Diff line number Diff line
@@ -92,3 +92,14 @@ config PCIE_DPC 
	  will be handled by the DPC driver.  If your system doesn't

	  have this capability or you do not want to use this feature,

	  it is safe to answer N.



config PCIE_PTM

	bool "PCIe Precision Time Measurement support"

	default n

	depends on PCIEPORTBUS

	help

	  This enables PCI Express Precision Time Measurement (PTM)

	  support.



	  This is only useful if you have devices that support PTM, but it

	  is safe to enable even if you don't.

drivers/pci/pcie/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -16,3 +16,4 @@ obj-$(CONFIG_PCIEAER) += aer/ 
obj-$(CONFIG_PCIE_PME) += pme.o



obj-$(CONFIG_PCIE_DPC) += pcie-dpc.o

obj-$(CONFIG_PCIE_PTM) += ptm.o

drivers/pci/pcie/ptm.c

0 → 100644
+142 −0
Original line number Diff line number Diff line 
/*

 * PCI Express Precision Time Measurement

 * Copyright (c) 2016, Intel Corporation.

 *

 * This program is free software; you can redistribute it and/or modify it

 * under the terms and conditions of the GNU General Public License,

 * version 2, as published by the Free Software Foundation.

 *

 * This program is distributed in the hope it will be useful, but WITHOUT

 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or

 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for

 * more details.

 */



#include <linux/module.h>

#include <linux/init.h>

#include <linux/pci.h>

#include "../pci.h"



static void pci_ptm_info(struct pci_dev *dev)

{

	char clock_desc[8];



	switch (dev->ptm_granularity) {

	case 0:

		snprintf(clock_desc, sizeof(clock_desc), "unknown");

		break;

	case 255:

		snprintf(clock_desc, sizeof(clock_desc), ">254ns");

		break;

	default:

		snprintf(clock_desc, sizeof(clock_desc), "%udns",

			 dev->ptm_granularity);

		break;

	}

	dev_info(&dev->dev, "PTM enabled%s, %s granularity\n",

		 dev->ptm_root ? " (root)" : "", clock_desc);

}



void pci_ptm_init(struct pci_dev *dev)

{

	int pos;

	u32 cap, ctrl;

	u8 local_clock;

	struct pci_dev *ups;



	if (!pci_is_pcie(dev))

		return;



	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM);

	if (!pos)

		return;



	/*

	 * Enable PTM only on interior devices (root ports, switch ports,

	 * etc.) on the assumption that it causes no link traffic until an

	 * endpoint enables it.

	 */

	if ((pci_pcie_type(dev) == PCI_EXP_TYPE_ENDPOINT ||

	     pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END))

		return;



	pci_read_config_dword(dev, pos + PCI_PTM_CAP, &cap);

	local_clock = (cap & PCI_PTM_GRANULARITY_MASK) >> 8;



	/*

	 * There's no point in enabling PTM unless it's enabled in the

	 * upstream device or this device can be a PTM Root itself.  Per

	 * the spec recommendation (PCIe r3.1, sec 7.32.3), select the

	 * furthest upstream Time Source as the PTM Root.

	 */

	ups = pci_upstream_bridge(dev);

	if (ups && ups->ptm_enabled) {

		ctrl = PCI_PTM_CTRL_ENABLE;

		if (ups->ptm_granularity == 0)

			dev->ptm_granularity = 0;

		else if (ups->ptm_granularity > local_clock)

			dev->ptm_granularity = ups->ptm_granularity;

	} else {

		if (cap & PCI_PTM_CAP_ROOT) {

			ctrl = PCI_PTM_CTRL_ENABLE | PCI_PTM_CTRL_ROOT;

			dev->ptm_root = 1;

			dev->ptm_granularity = local_clock;

		} else

			return;

	}



	ctrl |= dev->ptm_granularity << 8;

	pci_write_config_dword(dev, pos + PCI_PTM_CTRL, ctrl);

	dev->ptm_enabled = 1;



	pci_ptm_info(dev);

}



int pci_enable_ptm(struct pci_dev *dev, u8 *granularity)

{

	int pos;

	u32 cap, ctrl;

	struct pci_dev *ups;



	if (!pci_is_pcie(dev))

		return -EINVAL;



	pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_PTM);

	if (!pos)

		return -EINVAL;



	pci_read_config_dword(dev, pos + PCI_PTM_CAP, &cap);

	if (!(cap & PCI_PTM_CAP_REQ))

		return -EINVAL;



	/*

	 * For a PCIe Endpoint, PTM is only useful if the endpoint can

	 * issue PTM requests to upstream devices that have PTM enabled.

	 *

	 * For Root Complex Integrated Endpoints, there is no upstream

	 * device, so there must be some implementation-specific way to

	 * associate the endpoint with a time source.

	 */

	if (pci_pcie_type(dev) == PCI_EXP_TYPE_ENDPOINT) {

		ups = pci_upstream_bridge(dev);

		if (!ups || !ups->ptm_enabled)

			return -EINVAL;



		dev->ptm_granularity = ups->ptm_granularity;

	} else if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) {

		dev->ptm_granularity = 0;

	} else

		return -EINVAL;



	ctrl = PCI_PTM_CTRL_ENABLE;

	ctrl |= dev->ptm_granularity << 8;

	pci_write_config_dword(dev, pos + PCI_PTM_CTRL, ctrl);

	dev->ptm_enabled = 1;



	pci_ptm_info(dev);



	if (granularity)

		*granularity = dev->ptm_granularity;

	return 0;

}

EXPORT_SYMBOL(pci_enable_ptm);

drivers/pci/probe.c

+3 −0
Original line number Diff line number Diff line
@@ -1667,6 +1667,9 @@ static void pci_init_capabilities(struct pci_dev *dev) 
	pci_enable_acs(dev);



	pci_cleanup_aer_error_status_regs(dev);



	/* Precision Time Measurement */

	pci_ptm_init(dev);

}



/*