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Commit 9d468a2b authored by Jaegeuk Kim's avatar Jaegeuk Kim
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Revert "locking/atomics: COCCINELLE/treewide: Convert trivial ACCESS_ONCE()... 

Revert "locking/atomics: COCCINELLE/treewide: Convert trivial ACCESS_ONCE() patterns to READ_ONCE()/WRITE_ONCE()"

Change fscrypt only.

This reverts commit 4bb665c7.
parent 13b237d1

arch/arc/kernel/smp.c

+1 −1
Original line number Diff line number Diff line
@@ -250,7 +250,7 @@ static void ipi_send_msg_one(int cpu, enum ipi_msg_type msg) 
	 * and read back old value

	 */

	do {

		new = old = READ_ONCE(*ipi_data_ptr);

		new = old = ACCESS_ONCE(*ipi_data_ptr);

		new |= 1U << msg;

	} while (cmpxchg(ipi_data_ptr, old, new) != old);

arch/arm/include/asm/spinlock.h

+1 −1
Original line number Diff line number Diff line
@@ -74,7 +74,7 @@ static inline void arch_spin_lock(arch_spinlock_t *lock) 


	while (lockval.tickets.next != lockval.tickets.owner) {

		wfe();

		lockval.tickets.owner = READ_ONCE(lock->tickets.owner);

		lockval.tickets.owner = ACCESS_ONCE(lock->tickets.owner);

	}



	smp_mb();

arch/arm/mach-tegra/cpuidle-tegra20.c

+1 −1
Original line number Diff line number Diff line
@@ -179,7 +179,7 @@ static int tegra20_idle_lp2_coupled(struct cpuidle_device *dev, 
	bool entered_lp2 = false;



	if (tegra_pending_sgi())

		WRITE_ONCE(abort_flag, true);

		ACCESS_ONCE(abort_flag) = true;



	cpuidle_coupled_parallel_barrier(dev, &abort_barrier);

arch/arm/vdso/vgettimeofday.c

+1 −1
Original line number Diff line number Diff line
@@ -35,7 +35,7 @@ static notrace u32 __vdso_read_begin(const struct vdso_data *vdata) 
{

	u32 seq;

repeat:

	seq = READ_ONCE(vdata->seq_count);

	seq = ACCESS_ONCE(vdata->seq_count);

	if (seq & 1) {

		cpu_relax();

		goto repeat;

arch/ia64/include/asm/spinlock.h

+4 −4
Original line number Diff line number Diff line
@@ -62,7 +62,7 @@ static __always_inline void __ticket_spin_lock(arch_spinlock_t *lock) 


static __always_inline int __ticket_spin_trylock(arch_spinlock_t *lock)

{

	int tmp = READ_ONCE(lock->lock);

	int tmp = ACCESS_ONCE(lock->lock);



	if (!(((tmp >> TICKET_SHIFT) ^ tmp) & TICKET_MASK))

		return ia64_cmpxchg(acq, &lock->lock, tmp, tmp + 1, sizeof (tmp)) == tmp;
@@ -74,19 +74,19 @@ static __always_inline void __ticket_spin_unlock(arch_spinlock_t *lock) 
	unsigned short	*p = (unsigned short *)&lock->lock + 1, tmp;



	asm volatile ("ld2.bias %0=[%1]" : "=r"(tmp) : "r"(p));

	WRITE_ONCE(*p, (tmp + 2) & ~1);

	ACCESS_ONCE(*p) = (tmp + 2) & ~1;

}



static inline int __ticket_spin_is_locked(arch_spinlock_t *lock)

{

	long tmp = READ_ONCE(lock->lock);

	long tmp = ACCESS_ONCE(lock->lock);



	return !!(((tmp >> TICKET_SHIFT) ^ tmp) & TICKET_MASK);

}



static inline int __ticket_spin_is_contended(arch_spinlock_t *lock)

{

	long tmp = READ_ONCE(lock->lock);

	long tmp = ACCESS_ONCE(lock->lock);



	return ((tmp - (tmp >> TICKET_SHIFT)) & TICKET_MASK) > 1;

}