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Commit 9d1ed75a authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "msm: ipa3: add initial support for ipa 4.5 and gsi 2.5"

parents 1fc3475b 0eddbacb
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+14 −0
Original line number Diff line number Diff line
@@ -716,6 +716,13 @@ static uint32_t gsi_get_max_channels(enum gsi_ver ver)
			GSI_V2_2_EE_n_GSI_HW_PARAM_2_GSI_NUM_CH_PER_EE_BMSK) >>
			GSI_V2_2_EE_n_GSI_HW_PARAM_2_GSI_NUM_CH_PER_EE_SHFT;
		break;
	case GSI_VER_2_5:
		reg = gsi_readl(gsi_ctx->base +
			GSI_V2_2_EE_n_GSI_HW_PARAM_2_OFFS(gsi_ctx->per.ee));
		reg = (reg &
			GSI_V2_2_EE_n_GSI_HW_PARAM_2_GSI_NUM_CH_PER_EE_BMSK) >>
			GSI_V2_2_EE_n_GSI_HW_PARAM_2_GSI_NUM_CH_PER_EE_SHFT;
		break;
	}

	GSIDBG("max channels %d\n", reg);
@@ -766,6 +773,13 @@ static uint32_t gsi_get_max_event_rings(enum gsi_ver ver)
			GSI_V2_2_EE_n_GSI_HW_PARAM_2_GSI_NUM_EV_PER_EE_BMSK) >>
			GSI_V2_2_EE_n_GSI_HW_PARAM_2_GSI_NUM_EV_PER_EE_SHFT;
		break;
	case GSI_VER_2_5:
		reg = gsi_readl(gsi_ctx->base +
			GSI_V2_2_EE_n_GSI_HW_PARAM_2_OFFS(gsi_ctx->per.ee));
		reg = (reg &
			GSI_V2_2_EE_n_GSI_HW_PARAM_2_GSI_NUM_EV_PER_EE_BMSK) >>
			GSI_V2_2_EE_n_GSI_HW_PARAM_2_GSI_NUM_EV_PER_EE_SHFT;
		break;
	}

	GSIDBG("max event rings %d\n", reg);
+4 −0
Original line number Diff line number Diff line
@@ -2801,6 +2801,9 @@ const char *ipa_get_version_string(enum ipa_hw_type ver)
	case IPA_HW_v4_2:
		str = "4.2";
		break;
	case IPA_HW_v4_5:
		str = "4.5";
		break;
	default:
		str = "Invalid version";
		break;
@@ -2857,6 +2860,7 @@ static int ipa_generic_plat_drv_probe(struct platform_device *pdev_p)
	case IPA_HW_v4_0:
	case IPA_HW_v4_1:
	case IPA_HW_v4_2:
	case IPA_HW_v4_5:
		result = ipa3_plat_drv_probe(pdev_p, ipa_api_ctrl,
			ipa_plat_drv_match);
		break;
+18 −9
Original line number Diff line number Diff line
@@ -4464,6 +4464,9 @@ static enum gsi_ver ipa3_get_gsi_ver(enum ipa_hw_type ipa_hw_type)
	case IPA_HW_v4_2:
		gsi_ver = GSI_VER_2_2;
		break;
	case IPA_HW_v4_5:
		gsi_ver = GSI_VER_2_5;
		break;
	default:
		IPAERR("No GSI version for ipa type %d\n", ipa_hw_type);
		WARN_ON(1);
@@ -4523,7 +4526,6 @@ static int ipa3_post_init(const struct ipa3_plat_drv_res *resource_p,
	/* move proxy vote for modem on ipa3_post_init */
	if (ipa3_ctx->ipa_hw_type != IPA_HW_v4_0)
		ipa3_proxy_clk_vote();

	/* SMMU was already attached if used, safe to do allocations */
	if (ipahal_init(ipa3_ctx->ipa_hw_type, ipa3_ctx->mmio,
		ipa3_ctx->pdev)) {
@@ -4647,8 +4649,8 @@ static int ipa3_post_init(const struct ipa3_plat_drv_res *resource_p,
	}

	/*
	 * IPAv3.5 and above requires to disable prefetch for USB in order
	 * to allow MBIM to work.
	 * Disable prefetch for USB or MHI at IPAv3.5/IPA.3.5.1
	 * This is to allow MBIM to work.
	 */
	if ((ipa3_ctx->ipa_hw_type >= IPA_HW_v3_5
		&& ipa3_ctx->ipa_hw_type < IPA_HW_v4_0) &&
@@ -4901,18 +4903,20 @@ static ssize_t ipa3_write(struct file *file, const char __user *buf,
		if (count && (dbg_buff[count - 1] == '\n'))
			dbg_buff[count - 1] = '\0';

		/*
		 * This logic enforeces MHI mode based on userspace input.
		 * Note that MHI mode could be already determined due
		 *  to previous logic.
		 */
		if (!strcasecmp(dbg_buff, "MHI")) {
			ipa3_ctx->ipa_config_is_mhi = true;
			pr_info(
				"IPA is loading with MHI configuration\n");
		} else if (!strcmp(dbg_buff, "1")) {
			pr_info(
				"IPA is loading with non MHI configuration\n");
		} else {
		} else if (strcmp(dbg_buff, "1")) {
			IPAERR("got invalid string %s not loading FW\n",
				dbg_buff);
			return count;
		}
		pr_info("IPA is loading with %sMHI configuration\n",
			ipa3_ctx->ipa_config_is_mhi ? "" : "non ");
	}

	queue_work(ipa3_ctx->transport_power_mgmt_wq,
@@ -5658,6 +5662,11 @@ static int get_ipa_dts_configuration(struct platform_device *pdev,
		return -ENODEV;
	}

	if (ipa_drv_res->ipa_hw_type >= IPA_HW_MAX) {
		IPAERR(":IPA version is greater than the MAX\n");
		return -ENODEV;
	}

	/* Get IPA HW mode */
	result = of_property_read_u32(pdev->dev.of_node, "qcom,ipa-hw-mode",
			&ipa_drv_res->ipa3_hw_mode);
+55 −10
Original line number Diff line number Diff line
@@ -217,6 +217,8 @@ enum ipa_ver {
	IPA_4_0_MHI,
	IPA_4_1,
	IPA_4_2,
	IPA_4_5,
	IPA_4_5_MHI,
	IPA_VER_MAX,
};

@@ -2619,7 +2621,6 @@ void ipa3_cfg_qsb(void)
int ipa3_init_hw(void)
{
	u32 ipa_version = 0;
	u32 val;
	struct ipahal_reg_counter_cfg cnt_cfg;

	/* Read IPA version and make sure we have access to the registers */
@@ -2630,26 +2631,25 @@ int ipa3_init_hw(void)
	switch (ipa3_ctx->ipa_hw_type) {
	case IPA_HW_v3_0:
	case IPA_HW_v3_1:
		val = IPA_BCR_REG_VAL_v3_0;
		ipahal_write_reg(IPA_BCR, IPA_BCR_REG_VAL_v3_0);
		break;
	case IPA_HW_v3_5:
	case IPA_HW_v3_5_1:
		val = IPA_BCR_REG_VAL_v3_5;
		ipahal_write_reg(IPA_BCR, IPA_BCR_REG_VAL_v3_5);
		break;
	case IPA_HW_v4_0:
	case IPA_HW_v4_1:
		val = IPA_BCR_REG_VAL_v4_0;
		ipahal_write_reg(IPA_BCR, IPA_BCR_REG_VAL_v4_0);
		break;
	case IPA_HW_v4_2:
		val = IPA_BCR_REG_VAL_v4_2;
		ipahal_write_reg(IPA_BCR, IPA_BCR_REG_VAL_v4_2);
		break;
	default:
		IPAERR("unknown HW type in dts\n");
		return -EFAULT;
		IPADBG("Do not update BCR - hw_type=%d\n",
			ipa3_ctx->ipa_hw_type);
		break;
	}

	ipahal_write_reg(IPA_BCR, val);

	if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_0) {
		struct ipahal_reg_clkon_cfg clkon_cfg;
		struct ipahal_reg_tx_cfg tx_cfg;
@@ -2720,6 +2720,11 @@ u8 ipa3_get_hw_type_index(void)
	case IPA_HW_v4_2:
		hw_type_index = IPA_4_2;
		break;
	case IPA_HW_v4_5:
		hw_type_index = IPA_4_5;
		if (ipa3_ctx->ipa_config_is_mhi)
			hw_type_index = IPA_4_5_MHI;
		break;
	default:
		IPAERR("Incorrect IPA version %d\n", ipa3_ctx->ipa_hw_type);
		hw_type_index = IPA_3_0;
@@ -4131,7 +4136,9 @@ int ipa3_init_mem_partition(enum ipa_hw_type type)
	case IPA_HW_v4_2:
		ipa3_ctx->ctrl->mem_partition = &ipa_4_2_mem_part;
		break;

	case IPA_HW_v4_5:
		ipa3_ctx->ctrl->mem_partition = &ipa_4_2_mem_part;
		break;
	case IPA_HW_None:
	case IPA_HW_v1_0:
	case IPA_HW_v1_1:
@@ -5421,6 +5428,36 @@ static void ipa3_write_rsrc_grp_type_reg(int group_index,
			}
		}
		break;
	case IPA_4_5:
	case IPA_4_5_MHI:
		if (src) {
			switch (group_index) {
			case IPA_v4_2_GROUP_UL_DL:
				ipahal_write_reg_n_fields(
					IPA_SRC_RSRC_GRP_01_RSRC_TYPE_n,
					n, val);
				break;
			default:
				IPAERR(
				" Invalid source resource group,index #%d\n",
				group_index);
				break;
			}
		} else {
			switch (group_index) {
			case IPA_v4_2_GROUP_UL_DL:
				ipahal_write_reg_n_fields(
					IPA_DST_RSRC_GRP_01_RSRC_TYPE_n,
					n, val);
				break;
			default:
				IPAERR(
				" Invalid destination resource group,index #%d\n",
				group_index);
				break;
			}
		}
		break;

	default:
		IPAERR("invalid hw type\n");
@@ -5537,6 +5574,13 @@ void ipa3_set_resorce_groups_min_max_limits(void)
		src_grp_idx_max = IPA_v4_2_SRC_GROUP_MAX;
		dst_grp_idx_max = IPA_v4_2_DST_GROUP_MAX;
		break;
	case IPA_4_5:
	case IPA_4_5_MHI:
		src_rsrc_type_max = IPA_v4_0_RSRC_GRP_TYPE_SRC_MAX;
		dst_rsrc_type_max = IPA_v4_0_RSRC_GRP_TYPE_DST_MAX;
		src_grp_idx_max = IPA_v4_2_SRC_GROUP_MAX;
		dst_grp_idx_max = IPA_v4_2_DST_GROUP_MAX;
		break;
	default:
		IPAERR("invalid hw type index\n");
		WARN_ON(1);
@@ -6005,6 +6049,7 @@ bool ipa3_is_msm_device(void)
	case IPA_HW_v3_0:
	case IPA_HW_v3_5:
	case IPA_HW_v4_0:
	case IPA_HW_v4_5:
		return false;
	case IPA_HW_v3_1:
	case IPA_HW_v3_5_1:
+1 −1
Original line number Diff line number Diff line
@@ -2294,7 +2294,7 @@ int ipahal_print_all_regs(void)
	}

	for (i = 0; i < IPA_REG_MAX ; i++) {
		if (!ipahal_reg_objs[IPA_HW_v4_0][i].en_print)
		if (!ipahal_reg_objs[ipahal_ctx->hw_type][i].en_print)
			continue;

		j = ipahal_reg_objs[ipahal_ctx->hw_type][i].n_start;
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