ARM: dts: msm: Add QUPV3 and Slimbus DT nodes for SDMMAGPIE (9d0e4cf6) · Commits · e / devices / android_kernel_oneplus_sm8150

arch/arm64/boot/dts/qcom/sdmmagpie-pinctrl.dtsi

+801 −0

Original line number	Diff line number	Diff line
		@@ -19,5 +19,806 @@
		#gpio-cells = <2>;
		interrupt-controller;
		#interrupt-cells = <2>;

		/* QUPv3 South SE mappings */
		/* SE 0 pin mappings */
		qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
		qupv3_se0_i2c_active: qupv3_se0_i2c_active {
		mux {
		pins = "gpio49", "gpio50";
		function = "qup00";
		};

		config {
		pins = "gpio49", "gpio50";
		drive-strength = <2>;
		bias-disable;
		};
		};

		qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
		mux {
		pins = "gpio49", "gpio50";
		function = "gpio";
		};

		config {
		pins = "gpio49", "gpio50";
		drive-strength = <2>;
		bias-pull-up;
		};
		};
		};

		qupv3_se0_spi_pins: qupv3_se0_spi_pins {
		qupv3_se0_spi_active: qupv3_se0_spi_active {
		mux {
		pins = "gpio49", "gpio50", "gpio51",
		"gpio52";
		function = "qup00";
		};

		config {
		pins = "gpio49", "gpio50", "gpio51",
		"gpio52";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
		mux {
		pins = "gpio49", "gpio50", "gpio51",
		"gpio52";
		function = "gpio";
		};

		config {
		pins = "gpio49", "gpio50", "gpio51",
		"gpio52";
		drive-strength = <6>;
		bias-disable;
		};
		};
		};

		/* SE 1 pin mappings */
		qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
		qupv3_se1_i2c_active: qupv3_se1_i2c_active {
		mux {
		pins = "gpio0", "gpio1";
		function = "qup01";
		};

		config {
		pins = "gpio0", "gpio1";
		drive-strength = <2>;
		bias-disable;
		};
		};

		qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
		mux {
		pins = "gpio0", "gpio1";
		function = "gpio";
		};

		config {
		pins = "gpio0", "gpio1";
		drive-strength = <2>;
		bias-pull-up;
		};
		};
		};

		qupv3_se1_spi_pins: qupv3_se1_spi_pins {
		qupv3_se1_spi_active: qupv3_se1_spi_active {
		mux {
		pins = "gpio0", "gpio1", "gpio2",
		"gpio3";
		function = "qup01";
		};

		config {
		pins = "gpio0", "gpio1", "gpio2",
		"gpio3";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
		mux {
		pins = "gpio0", "gpio1", "gpio2",
		"gpio3";
		function = "gpio";
		};

		config {
		pins = "gpio0", "gpio1", "gpio2",
		"gpio3";
		drive-strength = <6>;
		bias-disable;
		};
		};
		};

		/* SE 2 pin mappings */
		qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
		qupv3_se2_i2c_active: qupv3_se2_i2c_active {
		mux {
		pins = "gpio34", "gpio35";
		function = "qup02";
		};

		config {
		pins = "gpio34", "gpio35";
		drive-strength = <2>;
		bias-disable;
		};
		};

		qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
		mux {
		pins = "gpio34", "gpio35";
		function = "gpio";
		};

		config {
		pins = "gpio34", "gpio35";
		drive-strength = <2>;
		bias-pull-up;
		};
		};
		};

		/* SE 3 pin mappings */
		qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
		qupv3_se3_i2c_active: qupv3_se3_i2c_active {
		mux {
		pins = "gpio38", "gpio39";
		function = "qup03";
		};

		config {
		pins = "gpio38", "gpio39";
		drive-strength = <2>;
		bias-disable;
		};
		};

		qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
		mux {
		pins = "gpio38", "gpio39";
		function = "gpio";
		};

		config {
		pins = "gpio38", "gpio39";
		drive-strength = <2>;
		bias-pull-up;
		};
		};
		};

		qupv3_se3_4uart_pins: qupv3_se3_4uart_pins {
		qupv3_se3_ctsrx: qupv3_se3_ctsrx {
		mux {
		pins = "gpio38", "gpio41";
		function = "qup03";
		};

		config {
		pins = "gpio38", "gpio41";
		drive-strength = <2>;
		bias-no-pull;
		};
		};

		qupv3_se3_rts: qupv3_se3_rts {
		mux {
		pins = "gpio39";
		function = "qup03";
		};

		config {
		pins = "gpio39";
		drive-strength = <2>;
		bias-pull-down;
		};
		};

		qupv3_se3_tx: qupv3_se3_tx {
		mux {
		pins = "gpio40";
		function = "qup03";
		};

		config {
		pins = "gpio40";
		drive-strength = <2>;
		bias-pull-up;
		};
		};
		};

		qupv3_se3_spi_pins: qupv3_se3_spi_pins {
		qupv3_se3_spi_active: qupv3_se3_spi_active {
		mux {
		pins = "gpio38", "gpio39", "gpio40",
		"gpio41";
		function = "qup03";
		};

		config {
		pins = "gpio38", "gpio39", "gpio40",
		"gpio41";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se3_spi_sleep: qupv3_se3_spi_sleep {
		mux {
		pins = "gpio38", "gpio39", "gpio40",
		"gpio41";
		function = "gpio";
		};

		config {
		pins = "gpio38", "gpio39", "gpio40",
		"gpio41";
		drive-strength = <6>;
		bias-disable;
		};
		};
		};

		/* SE 4 pin mappings */
		qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
		qupv3_se4_i2c_active: qupv3_se4_i2c_active {
		mux {
		pins = "gpio53", "gpio54";
		function = "qup04";
		};

		config {
		pins = "gpio53", "gpio54";
		drive-strength = <2>;
		bias-disable;
		};
		};

		qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
		mux {
		pins = "gpio53", "gpio54";
		function = "gpio";
		};

		config {
		pins = "gpio53", "gpio54";
		drive-strength = <2>;
		bias-pull-up;
		};
		};
		};

		qupv3_se4_4uart_pins: qupv3_se4_4uart_pins {
		qupv3_se4_ctsrx: qupv3_se4_ctsrx {
		mux {
		pins = "gpio53", "gpio56";
		function = "qup04";
		};

		config {
		pins = "gpio53", "gpio56";
		drive-strength = <2>;
		bias-no-pull;
		};
		};

		qupv3_se4_rts: qupv3_se4_rts {
		mux {
		pins = "gpio54";
		function = "qup04";
		};

		config {
		pins = "gpio54";
		drive-strength = <2>;
		bias-pull-down;
		};
		};

		qupv3_se4_tx: qupv3_se4_tx {
		mux {
		pins = "gpio55";
		function = "qup04";
		};

		config {
		pins = "gpio55";
		drive-strength = <2>;
		bias-pull-up;
		};
		};
		};

		qupv3_se4_spi_pins: qupv3_se4_spi_pins {
		qupv3_se4_spi_active: qupv3_se4_spi_active {
		mux {
		pins = "gpio53", "gpio54", "gpio55",
		"gpio56";
		function = "qup04";
		};

		config {
		pins = "gpio53", "gpio54", "gpio55",
		"gpio56";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
		mux {
		pins = "gpio53", "gpio54", "gpio55",
		"gpio56";
		function = "gpio";
		};

		config {
		pins = "gpio53", "gpio54", "gpio55",
		"gpio56";
		drive-strength = <6>;
		bias-disable;
		};
		};
		};

		/* QUPv3 North instances */
		/* SE 6 pin mappings */
		qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
		qupv3_se6_i2c_active: qupv3_se6_i2c_active {
		mux {
		pins = "gpio59", "gpio60";
		function = "qup10";
		};

		config {
		pins = "gpio59", "gpio60";
		drive-strength = <2>;
		bias-disable;
		};
		};

		qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep {
		mux {
		pins = "gpio59", "gpio60";
		function = "gpio";
		};

		config {
		pins = "gpio59", "gpio60";
		drive-strength = <2>;
		bias-pull-up;
		};
		};
		};

		qupv3_se6_spi_pins: qupv3_se6_spi_pins {
		qupv3_se6_spi_active: qupv3_se6_spi_active {
		mux {
		pins = "gpio59", "gpio60", "gpio61",
		"gpio62";
		function = "qup10";
		};

		config {
		pins = "gpio59", "gpio60", "gpio61",
		"gpio62";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
		mux {
		pins = "gpio59", "gpio60", "gpio61",
		"gpio62";
		function = "gpio";
		};

		config {
		pins = "gpio59", "gpio60", "gpio61",
		"gpio62";
		drive-strength = <6>;
		bias-disable;
		};
		};
		};

		/* SE 7 pin mappings */
		qupv3_se7_i2c_pins: qupv3_se7_i2c_pins {
		qupv3_se7_i2c_active: qupv3_se7_i2c_active {
		mux {
		pins = "gpio6", "gpio7";
		function = "qup11";
		};

		config {
		pins = "gpio6", "gpio7";
		drive-strength = <2>;
		bias-disable;
		};
		};

		qupv3_se7_i2c_sleep: qupv3_se7_i2c_sleep {
		mux {
		pins = "gpio6", "gpio7";
		function = "gpio";
		};

		config {
		pins = "gpio6", "gpio7";
		drive-strength = <2>;
		bias-pull-up;
		};
		};
		};

		qupv3_se7_spi_pins: qupv3_se7_spi_pins {
		qupv3_se7_spi_active: qupv3_se7_spi_active {
		mux {
		pins = "gpio6", "gpio7", "gpio8",
		"gpio9";
		function = "qup11";
		};

		config {
		pins = "gpio6", "gpio7", "gpio8",
		"gpio9";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se7_spi_sleep: qupv3_se7_spi_sleep {
		mux {
		pins = "gpio6", "gpio7", "gpio8",
		"gpio9";
		function = "gpio";
		};

		config {
		pins = "gpio6", "gpio7", "gpio8",
		"gpio9";
		drive-strength = <6>;
		bias-disable;
		};
		};
		};

		/* SE 8 pin mappings */
		qupv3_se8_i2c_pins: qupv3_se8_i2c_pins {
		qupv3_se8_i2c_active: qupv3_se8_i2c_active {
		mux {
		pins = "gpio42", "gpio43";
		function = "qup12";
		};

		config {
		pins = "gpio42", "gpio43";
		drive-strength = <2>;
		bias-disable;
		};
		};

		qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep {
		mux {
		pins = "gpio42", "gpio43";
		function = "gpio";
		};

		config {
		pins = "gpio42", "gpio43";
		drive-strength = <2>;
		bias-pull-up;
		};
		};
		};

		qupv3_se8_2uart_pins: qupv3_se8_2uart_pins {
		qupv3_se8_2uart_active: qupv3_se8_2uart_active {
		mux {
		pins = "gpio44", "gpio45";
		function = "qup12";
		};

		config {
		pins = "gpio44", "gpio45";
		drive-strength = <2>;
		bias-disable;
		};
		};

		qupv3_se8_2uart_sleep: qupv3_se8_2uart_sleep {
		mux {
		pins = "gpio44", "gpio45";
		function = "gpio";
		};

		config {
		pins = "gpio44", "gpio45";
		drive-strength = <2>;
		bias-disable;
		};
		};
		};

		qupv3_se8_spi_pins: qupv3_se8_spi_pins {
		qupv3_se8_spi_active: qupv3_se8_spi_active {
		mux {
		pins = "gpio42", "gpio43", "gpio44",
		"gpio45";
		function = "qup12";
		};

		config {
		pins = "gpio42", "gpio43", "gpio44",
		"gpio45";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se8_spi_sleep: qupv3_se8_spi_sleep {
		mux {
		pins = "gpio42", "gpio43", "gpio44",
		"gpio45";
		function = "gpio";
		};

		config {
		pins = "gpio42", "gpio43", "gpio44",
		"gpio45";
		drive-strength = <6>;
		bias-disable;
		};
		};
		};

		/* SE 9 pin mappings */
		qupv3_se9_i2c_pins: qupv3_se9_i2c_pins {
		qupv3_se9_i2c_active: qupv3_se9_i2c_active {
		mux {
		pins = "gpio46", "gpio47";
		function = "qup13";
		};

		config {
		pins = "gpio46", "gpio47";
		drive-strength = <2>;
		bias-disable;
		};
		};

		qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep {
		mux {
		pins = "gpio46", "gpio47";
		function = "gpio";
		};

		config {
		pins = "gpio6", "gpio7";
		drive-strength = <2>;
		bias-pull-up;
		};
		};
		};

		/* SE 10 pin mappings */
		qupv3_se10_i2c_pins: qupv3_se10_i2c_pins {
		qupv3_se10_i2c_active: qupv3_se10_i2c_active {
		mux {
		pins = "gpio110", "gpio111";
		function = "qup14";
		};

		config {
		pins = "gpio110", "gpio111";
		drive-strength = <2>;
		bias-disable;
		};
		};

		qupv3_se10_i2c_sleep: qupv3_se10_i2c_sleep {
		mux {
		pins = "gpio110", "gpio111";
		function = "gpio";
		};

		config {
		pins = "gpio110", "gpio111";
		drive-strength = <2>;
		bias-pull-up;
		};
		};
		};

		qupv3_se10_4uart_pins: qupv3_se10_4uart_pins {
		qupv3_se10_ctsrx: qupv3_se10_ctsrx {
		mux {
		pins = "gpio110", "gpio113";
		function = "qup14";
		};

		config {
		pins = "gpio110", "gpio113";
		drive-strength = <2>;
		bias-no-pull;
		};
		};

		qupv3_se10_rts: qupv3_se10_rts {
		mux {
		pins = "gpio111";
		function = "qup14";
		};

		config {
		pins = "gpio111";
		drive-strength = <2>;
		bias-pull-down;
		};
		};

		qupv3_se10_tx: qupv3_se10_tx {
		mux {
		pins = "gpio112";
		function = "qup14";
		};

		config {
		pins = "gpio112";
		drive-strength = <2>;
		bias-pull-up;
		};
		};
		};

		qupv3_se10_spi_pins: qupv3_se10_spi_pins {
		qupv3_se10_spi_active: qupv3_se10_spi_active {
		mux {
		pins = "gpio110", "gpio111", "gpio112",
		"gpio113";
		function = "qup14";
		};

		config {
		pins = "gpio110", "gpio111", "gpio112",
		"gpio113";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se10_spi_sleep: qupv3_se10_spi_sleep {
		mux {
		pins = "gpio110", "gpio111", "gpio112",
		"gpio113";
		function = "gpio";
		};

		config {
		pins = "gpio110", "gpio111", "gpio112",
		"gpio113";
		drive-strength = <6>;
		bias-disable;
		};
		};
		};

		/* SE 11 pin mappings */
		qupv3_se11_i2c_pins: qupv3_se11_i2c_pins {
		qupv3_se11_i2c_active: qupv3_se11_i2c_active {
		mux {
		pins = "gpio101", "gpio102";
		function = "qup15";
		};

		config {
		pins = "gpio101", "gpio102";
		drive-strength = <2>;
		bias-disable;
		};
		};

		qupv3_se11_i2c_sleep: qupv3_se11_i2c_sleep {
		mux {
		pins = "gpio101", "gpio102";
		function = "gpio";
		};

		config {
		pins = "gpio101", "gpio102";
		drive-strength = <2>;
		bias-pull-up;
		};
		};
		};

		qupv3_se11_4uart_pins: qupv3_se11_4uart_pins {
		qupv3_se11_ctsrx: qupv3_se11_ctsrx {
		mux {
		pins = "gpio101", "gpio92";
		function = "qup15";
		};

		config {
		pins = "gpio101", "gpio92";
		drive-strength = <2>;
		bias-no-pull;
		};
		};

		qupv3_se11_rts: qupv3_se11_rts {
		mux {
		pins = "gpio102";
		function = "qup15";
		};

		config {
		pins = "gpio102";
		drive-strength = <2>;
		bias-pull-down;
		};
		};

		qupv3_se11_tx: qupv3_se11_tx {
		mux {
		pins = "gpio103";
		function = "qup15";
		};

		config {
		pins = "gpio103";
		drive-strength = <2>;
		bias-pull-up;
		};
		};
		};

		qupv3_se11_spi_pins: qupv3_se11_spi_pins {
		qupv3_se11_spi_active: qupv3_se11_spi_active {
		mux {
		pins = "gpio101", "gpio102", "gpio103",
		"gpio92";
		function = "qup15";
		};

		config {
		pins = "gpio101", "gpio102", "gpio103",
		"gpio92";
		drive-strength = <6>;
		bias-disable;
		};
		};

		qupv3_se11_spi_sleep: qupv3_se11_spi_sleep {
		mux {
		pins = "gpio101", "gpio102", "gpio103",
		"gpio92";
		function = "gpio";
		};

		config {
		pins = "gpio101", "gpio102", "gpio103",
		"gpio92";
		drive-strength = <6>;
		bias-disable;
		};
		};
		};
		};
		};

arch/arm64/boot/dts/qcom/sdmmagpie-qupv3.dtsi

0 → 100644

+565 −0

File added.

Preview size limit exceeded, changes collapsed.

arch/arm64/boot/dts/qcom/sdmmagpie.dtsi

+51 −0

Original line number	Diff line number	Diff line
		@@ -27,6 +27,16 @@
		qcom,msm-id = <365 0x0>;
		interrupt-parent = <&pdc>;

		aliases {
		spi0 = &qupv3_se0_spi;
		spi1 = &qupv3_se4_spi;
		i2c0 = &qupv3_se2_i2c;
		i2c1 = &qupv3_se7_i2c;
		i2c2 = &qupv3_se9_i2c;
		serial0 = &qupv3_se8_2uart;
		hsuart0 = &qupv3_se3_4uart;
		};

		cpus {
		#address-cells = <2>;
		#size-cells = <0>;
		@@ -719,6 +729,46 @@
		status = "ok";
		};

		slim_aud: slim@62dc0000 {
		cell-index = <1>;
		compatible = "qcom,slim-ngd";
		reg = <0x62dc0000 0x2c000>,
		<0x62d84000 0x2a000>;
		reg-names = "slimbus_physical", "slimbus_bam_physical";
		interrupts = <0 163 0>, <0 164 0>;
		interrupt-names = "slimbus_irq", "slimbus_bam_irq";
		qcom,apps-ch-pipes = <0x7c0000>;
		qcom,ea-pc = <0x300>;
		status = "disabled";
		qcom,iommu-s1-bypass;

		iommu_slim_aud_ctrl_cb: qcom,iommu_slim_ctrl_cb {
		compatible = "qcom,iommu-slim-ctrl-cb";
		iommus = <&apps_smmu 0x1be6 0x0>,
		<&apps_smmu 0x1bed 0x0>,
		<&apps_smmu 0x1bee 0x1>,
		<&apps_smmu 0x1bf0 0x1>;
		};

		};

		slim_qca: slim@62e40000 {
		cell-index = <3>;
		compatible = "qcom,slim-ngd";
		reg = <0x62e40000 0x2c000>,
		<0x62e04000 0x20000>;
		reg-names = "slimbus_physical", "slimbus_bam_physical";
		interrupts = <0 291 0>, <0 292 0>;
		interrupt-names = "slimbus_irq", "slimbus_bam_irq";
		status = "disabled";
		qcom,iommu-s1-bypass;

		iommu_slim_qca_ctrl_cb: qcom,iommu_slim_ctrl_cb {
		compatible = "qcom,iommu-slim-ctrl-cb";
		iommus = <&apps_smmu 0x1bf3 0x0>;
		};
		};

		wdog: qcom,wdt@17c10000{
		compatible = "qcom,msm-watchdog";
		reg = <0x17c10000 0x1000>;
		@@ -952,6 +1002,7 @@

		#include "sdmmagpie-pinctrl.dtsi"
		#include "sdmmagpie-gdsc.dtsi"
		#include "sdmmagpie-qupv3.dtsi"

		&pcie_0_gdsc {
		status = "ok";