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Commit 9ca52426 authored by Lynus Vaz's avatar Lynus Vaz
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dt-bindings: adreno: Documentation for the cx_misc register block 



Add the devicetree binding documentation for the CX MISC GPU register
block that is used for a few configuration settings.

Change-Id: I6ceca727be09aeb3902b00e24accaff155d4041c
Signed-off-by: default avatarLynus Vaz <lvaz@codeaurora.org>
parent 982dcbe0

Documentation/devicetree/bindings/gpu/adreno.txt

+5 −3
Original line number Diff line number Diff line
@@ -6,8 +6,9 @@ Required properties: 
- label:		A string used as a descriptive name for the device.

- compatible:		Must be "qcom,kgsl-3d0" and "qcom,kgsl-3d"

- reg:			Specifies the register base address and size, the shader memory

			base address and size (if it exists), and the base address and size

			of the CX_DBGC block (if it exists).

			base address and size (if it exists), base address and size

			of the CX_DBGC block (if it exists), and the base address and

			size of the CX_MISC block (if it exists).

- reg-names:		Resource names used for the physical address of device registers

			and shader memory. "kgsl_3d0_reg_memory" gives the physical address

			and length of device registers while "kgsl_3d0_shader_memory" gives
@@ -15,7 +16,8 @@ Required properties: 
			specified, "qfprom_memory" gives the range for the efuse

			registers used for various configuration options. If specified,

			"kgsl_3d0_cx_dbgc_memory" gives the physical address and length

			of the CX DBGC block.

			of the CX DBGC block. If specified, "cx_misc" gives

			the physical address and length of the CX_MISC block.

- interrupts:		Interrupt mapping for GPU IRQ.

- interrupt-names:	String property to describe the name of the interrupt.

- qcom,id:		An integer used as an identification number for the device.