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Commit 9c088868 authored by Veera Sundaram Sankaran's avatar Veera Sundaram Sankaran
Browse files

drm/msm/sde: add plane property to expose secure-ui support 



Add a property in plane to indicate the user-mode if
the SSPP supports secure-ui layers. This is set, based
on the target specific capability controlled by the
secure-ui-misr feature. Target specific allowed xin-mask
can be specified in the catalog. Add validation code
in crtc to allow only secure-ui allowed sspp to be staged
during secure-ui commit.

Change-Id: I0ff00b0e039c7c393c2197e95287a3027742e047
Signed-off-by: default avatarVeera Sundaram Sankaran <veeras@codeaurora.org>
parent 48be9273

drivers/gpu/drm/msm/sde/sde_crtc.c

+19 −1
Original line number Diff line number Diff line
@@ -4413,6 +4413,7 @@ static int _sde_crtc_check_secure_state(struct drm_crtc *crtc, 
		struct drm_crtc_state *state, struct plane_state pstates[],

		int cnt)

{

	struct drm_plane *plane;

	struct drm_encoder *encoder;

	struct sde_crtc_state *cstate;

	struct sde_crtc *sde_crtc;
@@ -4458,8 +4459,25 @@ static int _sde_crtc_check_secure_state(struct drm_crtc *crtc, 
			return -EINVAL;

		}



		/* only one blending stage is allowed in sec_crtc */

		/*

		 * - only one blending stage is allowed in sec_crtc

		 * - validate if pipe is allowed for sec-ui updates

		 */

		for (i = 1; i < cnt; i++) {

			if (!pstates[i].drm_pstate

					|| !pstates[i].drm_pstate->plane) {

				SDE_ERROR("crtc%d: invalid pstate at i:%d\n",

						crtc->base.id, i);

				return -EINVAL;

			}

			plane = pstates[i].drm_pstate->plane;



			if (!sde_plane_is_sec_ui_allowed(plane)) {

				SDE_ERROR("crtc%d: sec-ui not allowed in p%d\n",

						crtc->base.id, plane->base.id);

				return -EINVAL;

			}



			if (pstates[i].stage != pstates[i-1].stage) {

				SDE_ERROR(

				  "crtc%d: invalid blend stages %d:%d, %d:%d\n",

drivers/gpu/drm/msm/sde/sde_hw_catalog.c

+12 −0
Original line number Diff line number Diff line
@@ -3554,6 +3554,18 @@ static int _sde_hardware_post_caps(struct sde_mdss_cfg *sde_cfg, 
			max_vert_deci = max(max_vert_deci,

				sde_cfg->sspp[i].sblk->maxvdeciexp);

		}



		/*

		 * set sec-ui allowed SSPP feature flag based on allowed

		 * xin-mask if sec-ui-misr feature is enabled;

		 * otherwise allow for all SSPP

		 */

		if (!sde_cfg->sui_misr_supported

			|| (sde_cfg->sui_misr_supported

				&& (sde_cfg->sui_allow_xin_mask

					& BIT(sde_cfg->sspp[i].xin_id))))

			set_bit(SDE_SSPP_SEC_UI_ALLOWED,

					&sde_cfg->sspp[i].features);

	}



	/* this should be updated based on HW rev in future */

drivers/gpu/drm/msm/sde/sde_hw_catalog.h

+5 −0
Original line number Diff line number Diff line
@@ -149,6 +149,7 @@ enum { 
 * @SDE_SSPP_INVERSE_PMA     Alpha unmultiply (PMA) support

 * @SDE_SSPP_DGM_INVERSE_PMA Alpha unmultiply (PMA) support in DGM block

 * @SDE_SSPP_DGM_CSC         Support of color space conversion in DGM block

 * @SDE_SSPP_SEC_UI_ALLOWED   Allows secure-ui layers

 * @SDE_SSPP_MAX             maximum value

 */

enum {
@@ -179,6 +180,7 @@ enum { 
	SDE_SSPP_INVERSE_PMA,

	SDE_SSPP_DGM_INVERSE_PMA,

	SDE_SSPP_DGM_CSC,

	SDE_SSPP_SEC_UI_ALLOWED,

	SDE_SSPP_MAX

};
@@ -1034,6 +1036,8 @@ struct sde_perf_cfg { 
 * @pipe_order_type    indicate if it is required to specify pipe order

 * @delay_prg_fetch_start indicates if throttling the fetch start is required

 * @sui_misr_supported  indicate if secure-ui-misr is supported

 * @sui_allow_xin_mask  mask of all the xin-clients allowed during secure-ui

 *                         when secure-ui-misr feature is supported

 */

struct sde_mdss_cfg {

	u32 hwversion;
@@ -1070,6 +1074,7 @@ struct sde_mdss_cfg { 
	bool delay_prg_fetch_start;



	bool sui_misr_supported;

	u32 sui_allow_xin_mask;



	bool has_hdr;

	u32 mdss_count;

drivers/gpu/drm/msm/sde/sde_plane.c

+16 −0
Original line number Diff line number Diff line
@@ -251,6 +251,18 @@ static bool sde_plane_crtc_enabled(struct drm_plane_state *state) 
			state->crtc->state->enable;

}



bool sde_plane_is_sec_ui_allowed(struct drm_plane *plane)

{

	struct sde_plane *psde;



	if (!plane)

		return false;



	psde = to_sde_plane(plane);



	return (psde->features & BIT(SDE_SSPP_SEC_UI_ALLOWED));

}



/**

 * _sde_plane_calc_fill_level - calculate fill level of the given source format

 * @plane:		Pointer to drm plane
@@ -4360,6 +4372,10 @@ static void _sde_plane_install_properties(struct drm_plane *plane, 
			0, ~0, 0, PLANE_PROP_CSC_DMA_V1);

		sde_kms_info_add_keyint(info, "csc_dma_v1", 1);

	}



	if (psde->features & BIT(SDE_SSPP_SEC_UI_ALLOWED))

		sde_kms_info_add_keyint(info, "sec_ui_allowed", 1);



	msm_property_set_blob(&psde->property_info, &psde->blob_info,

			info->data, SDE_KMS_INFO_DATALEN(info),

			PLANE_PROP_INFO);

drivers/gpu/drm/msm/sde/sde_plane.h

+6 −0
Original line number Diff line number Diff line
@@ -346,4 +346,10 @@ int sde_plane_helper_reset_custom_properties(struct drm_plane *plane, 
 */

int sde_plane_get_sbuf_id(struct drm_plane *plane);



/* sde_plane_is_sec_ui_allowed - indicates if the sspp allows secure-ui layers

 * @plane: Pointer to DRM plane object

 * Returns: true if allowed; false otherwise

 */

bool sde_plane_is_sec_ui_allowed(struct drm_plane *plane);



#endif /* _SDE_PLANE_H_ */