Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 9bd66533 authored by Shefali Jain's avatar Shefali Jain
Browse files

clk: qcom: clk-alpha-pll: Add support of slew recalc API 



Add new API alpha_pll_slew_recalc_rate to correctly
calculate the rate for slew enabled PLL's.

Change-Id: I8428d99956d848b6c47a34d14dcf2b1ef9f8dc3a
Signed-off-by: default avatarShefali Jain <shefjain@codeaurora.org>
parent 93081f59

drivers/clk/qcom/clk-alpha-pll.c

+30 −2
Original line number Diff line number Diff line 
/*

 * Copyright (c) 2015, 2017-2018, The Linux Foundation. All rights reserved.

 * Copyright (c) 2015, 2017-2019, The Linux Foundation. All rights reserved.

 *

 * This software is licensed under the terms of the GNU General Public

 * License version 2, as published by the Free Software Foundation, and
@@ -1568,6 +1568,34 @@ static int clk_alpha_pll_slew_update(struct clk_alpha_pll *pll) 


static int clk_alpha_pll_calibrate(struct clk_hw *hw);



static unsigned long

clk_alpha_pll_slew_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)

{

	struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);

	u64 a = 0;

	u32 l, low, high, ctl, off = pll->offset;



	regmap_read(pll->clkr.regmap, off + PLL_L_VAL, &l);



	regmap_read(pll->clkr.regmap, off + PLL_USER_CTL, &ctl);

	if (ctl & PLL_ALPHA_EN) {

		regmap_read(pll->clkr.regmap, off + PLL_ALPHA_VAL, &low);

		if (pll->flags & SUPPORTS_16BIT_ALPHA) {

			a = low & ALPHA_16BIT_MASK;

		} else {

			regmap_read(pll->clkr.regmap, off + PLL_ALPHA_VAL_U,

						&high);

			a = (u64)high << 32 | low;

			a >>= ALPHA_REG_BITWIDTH - ALPHA_BITWIDTH;

		}

	}



	ctl >>= PLL_POST_DIV_SHIFT;

	ctl &= PLL_POST_DIV_MASK;



	return alpha_pll_calc_rate(pll, parent_rate, l, a) >> fls(ctl);

}



static int clk_alpha_pll_slew_set_rate(struct clk_hw *hw, unsigned long rate,

			unsigned long parent_rate)

{
@@ -1741,7 +1769,7 @@ static int clk_alpha_pll_slew_enable(struct clk_hw *hw) 
const struct clk_ops clk_alpha_pll_slew_ops = {

	.enable = clk_alpha_pll_slew_enable,

	.disable = clk_alpha_pll_disable,

	.recalc_rate = clk_alpha_pll_recalc_rate,

	.recalc_rate = clk_alpha_pll_slew_recalc_rate,

	.round_rate = clk_alpha_pll_round_rate,

	.set_rate = clk_alpha_pll_slew_set_rate,

	.list_registers = clk_alpha_pll_list_registers,