Loading drivers/clk/qcom/clk-rcg2.c +1 −29 Original line number Diff line number Diff line /* * Copyright (c) 2013, 2016-2018, The Linux Foundation. All rights reserved. * Copyright (c) 2013, 2016-2019, The Linux Foundation. All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and Loading Loading @@ -73,16 +73,6 @@ static struct freq_tbl cxo_f = { .n = 0, }; static void update_src_map(struct clk_hw *hw) { struct clk_rcg2 *rcg = to_clk_rcg2(hw); int i, num_parents = clk_hw_get_num_parents(hw); for (i = 0; i < num_parents; i++) if (!rcg->parent_map[i].cfg) cxo_f.src = rcg->parent_map[i].src; } static int clk_rcg2_is_enabled(struct clk_hw *hw) { struct clk_rcg2 *rcg = to_clk_rcg2(hw); Loading Loading @@ -524,12 +514,6 @@ static int __clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate, if (!f) return -EINVAL; /* * Set the correct source value for CXO as per * as per defined parent map. */ update_src_map(hw); /* * Return if the RCG is currently disabled. This configuration update * will happen as part of the RCG enable sequence. Loading Loading @@ -631,12 +615,6 @@ static int clk_rcg2_enable(struct clk_hw *hw) unsigned long rate; const struct freq_tbl *f; /* * Set the correct source value for CXO as per * as per defined parent map. */ update_src_map(hw); if (rcg->flags & FORCE_ENABLE_RCG) { clk_rcg2_set_force_enable(hw); return 0; Loading Loading @@ -678,12 +656,6 @@ static void clk_rcg2_disable(struct clk_hw *hw) { struct clk_rcg2 *rcg = to_clk_rcg2(hw); /* * Set the correct source value for CXO as per * as per defined parent map. */ update_src_map(hw); if (rcg->flags & FORCE_ENABLE_RCG) { clk_rcg2_clear_force_enable(hw); return; Loading drivers/clk/qcom/gcc-sdmmagpie.c +2 −2 Original line number Diff line number Diff line /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -43,8 +43,8 @@ static DEFINE_VDD_REGULATORS(vdd_cx, VDD_NUM, 1, vdd_corner); static DEFINE_VDD_REGULATORS(vdd_cx_ao, VDD_NUM, 1, vdd_corner); enum { P_AUD_REF_CLK, P_BI_TCXO, P_AUD_REF_CLK, P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_EVEN, P_GPLL0_OUT_MAIN, Loading Loading
drivers/clk/qcom/clk-rcg2.c +1 −29 Original line number Diff line number Diff line /* * Copyright (c) 2013, 2016-2018, The Linux Foundation. All rights reserved. * Copyright (c) 2013, 2016-2019, The Linux Foundation. All rights reserved. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and Loading Loading @@ -73,16 +73,6 @@ static struct freq_tbl cxo_f = { .n = 0, }; static void update_src_map(struct clk_hw *hw) { struct clk_rcg2 *rcg = to_clk_rcg2(hw); int i, num_parents = clk_hw_get_num_parents(hw); for (i = 0; i < num_parents; i++) if (!rcg->parent_map[i].cfg) cxo_f.src = rcg->parent_map[i].src; } static int clk_rcg2_is_enabled(struct clk_hw *hw) { struct clk_rcg2 *rcg = to_clk_rcg2(hw); Loading Loading @@ -524,12 +514,6 @@ static int __clk_rcg2_set_rate(struct clk_hw *hw, unsigned long rate, if (!f) return -EINVAL; /* * Set the correct source value for CXO as per * as per defined parent map. */ update_src_map(hw); /* * Return if the RCG is currently disabled. This configuration update * will happen as part of the RCG enable sequence. Loading Loading @@ -631,12 +615,6 @@ static int clk_rcg2_enable(struct clk_hw *hw) unsigned long rate; const struct freq_tbl *f; /* * Set the correct source value for CXO as per * as per defined parent map. */ update_src_map(hw); if (rcg->flags & FORCE_ENABLE_RCG) { clk_rcg2_set_force_enable(hw); return 0; Loading Loading @@ -678,12 +656,6 @@ static void clk_rcg2_disable(struct clk_hw *hw) { struct clk_rcg2 *rcg = to_clk_rcg2(hw); /* * Set the correct source value for CXO as per * as per defined parent map. */ update_src_map(hw); if (rcg->flags & FORCE_ENABLE_RCG) { clk_rcg2_clear_force_enable(hw); return; Loading
drivers/clk/qcom/gcc-sdmmagpie.c +2 −2 Original line number Diff line number Diff line /* * Copyright (c) 2018, The Linux Foundation. All rights reserved. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -43,8 +43,8 @@ static DEFINE_VDD_REGULATORS(vdd_cx, VDD_NUM, 1, vdd_corner); static DEFINE_VDD_REGULATORS(vdd_cx_ao, VDD_NUM, 1, vdd_corner); enum { P_AUD_REF_CLK, P_BI_TCXO, P_AUD_REF_CLK, P_CORE_BI_PLL_TEST_SE, P_GPLL0_OUT_EVEN, P_GPLL0_OUT_MAIN, Loading