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Commit 9b29e822 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-urgent-for-linus' of... 

Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
  x86: Clear TS in irq_ts_save() when in an atomic section
  x86: Detect use of extended APIC ID for AMD CPUs
  x86: memtest: remove 64-bit division
  x86, UV: Fix macros for multiple coherency domains
  x86: Fix non-lazy GS handling in sys_vm86()
  x86: Add quirk for reboot stalls on a Dell Optiplex 360
  x86: Fix UV BAU activation descriptor init
parents bec70683 0b8c3d5a

arch/x86/include/asm/apic.h

+1 −1
Original line number Diff line number Diff line
@@ -402,7 +402,7 @@ static inline unsigned default_get_apic_id(unsigned long x) 
{

	unsigned int ver = GET_APIC_VERSION(apic_read(APIC_LVR));



	if (APIC_XAPIC(ver))

	if (APIC_XAPIC(ver) || boot_cpu_has(X86_FEATURE_EXTD_APICID))

		return (x >> 24) & 0xFF;

	else

		return (x >> 24) & 0x0F;

arch/x86/include/asm/cpufeature.h

+1 −0
Original line number Diff line number Diff line
@@ -94,6 +94,7 @@ 
#define X86_FEATURE_TSC_RELIABLE (3*32+23) /* TSC is known to be reliable */

#define X86_FEATURE_NONSTOP_TSC	(3*32+24) /* TSC does not stop in C states */

#define X86_FEATURE_CLFLUSH_MONITOR (3*32+25) /* "" clflush reqd with monitor */

#define X86_FEATURE_EXTD_APICID	(3*32+26) /* has extended APICID (8 bits) */



/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */

#define X86_FEATURE_XMM3	(4*32+ 0) /* "pni" SSE-3 */

arch/x86/include/asm/i387.h

+6 −6
Original line number Diff line number Diff line
@@ -305,17 +305,17 @@ static inline void kernel_fpu_end(void) 
 * Some instructions like VIA's padlock instructions generate a spurious

 * DNA fault but don't modify SSE registers. And these instructions

 * get used from interrupt context as well. To prevent these kernel instructions

 * in interrupt context interact wrongly with other user/kernel fpu usage, we

 * in interrupt context interacting wrongly with other user/kernel fpu usage, we

 * should use them only in the context of irq_ts_save/restore()

 */

static inline int irq_ts_save(void)

{

	/*

	 * If we are in process context, we are ok to take a spurious DNA fault.

	 * Otherwise, doing clts() in process context require pre-emption to

	 * be disabled or some heavy lifting like kernel_fpu_begin()

	 * If in process context and not atomic, we can take a spurious DNA fault.

	 * Otherwise, doing clts() in process context requires disabling preemption

	 * or some heavy lifting like kernel_fpu_begin()

	 */

	if (!in_interrupt())

	if (!in_atomic())

		return 0;



	if (read_cr0() & X86_CR0_TS) {

arch/x86/include/asm/uv/uv_bau.h

+1 −1
Original line number Diff line number Diff line
@@ -37,7 +37,7 @@ 
#define UV_CPUS_PER_ACT_STATUS		32

#define UV_ACT_STATUS_MASK		0x3

#define UV_ACT_STATUS_SIZE		2

#define UV_ACTIVATION_DESCRIPTOR_SIZE	32

#define UV_ADP_SIZE			32

#define UV_DISTRIBUTION_SIZE		256

#define UV_SW_ACK_NPENDING		8

#define UV_NET_ENDPOINT_INTD		0x38

arch/x86/include/asm/uv/uv_hub.h

+4 −2
Original line number Diff line number Diff line
@@ -133,6 +133,7 @@ struct uv_scir_s { 
struct uv_hub_info_s {

	unsigned long		global_mmr_base;

	unsigned long		gpa_mask;

	unsigned int		gnode_extra;

	unsigned long		gnode_upper;

	unsigned long		lowmem_remap_top;

	unsigned long		lowmem_remap_base;
@@ -159,7 +160,8 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info); 
 * 		p -  PNODE (local part of nsids, right shifted 1)

 */

#define UV_NASID_TO_PNODE(n)		(((n) >> 1) & uv_hub_info->pnode_mask)

#define UV_PNODE_TO_NASID(p)		(((p) << 1) | uv_hub_info->gnode_upper)

#define UV_PNODE_TO_GNODE(p)		((p) |uv_hub_info->gnode_extra)

#define UV_PNODE_TO_NASID(p)		(UV_PNODE_TO_GNODE(p) << 1)



#define UV_LOCAL_MMR_BASE		0xf4000000UL

#define UV_GLOBAL_MMR32_BASE		0xf8000000UL
@@ -173,7 +175,7 @@ DECLARE_PER_CPU(struct uv_hub_info_s, __uv_hub_info); 
#define UV_GLOBAL_MMR32_PNODE_BITS(p)	((p) << (UV_GLOBAL_MMR32_PNODE_SHIFT))



#define UV_GLOBAL_MMR64_PNODE_BITS(p)					\

	((unsigned long)(p) << UV_GLOBAL_MMR64_PNODE_SHIFT)

	((unsigned long)(UV_PNODE_TO_GNODE(p)) << UV_GLOBAL_MMR64_PNODE_SHIFT)



#define UV_APIC_PNODE_SHIFT	6