Loading drivers/media/platform/msm/camera/cam_icp/icp_hw/bps_hw/bps_core.c +4 −2 Original line number Diff line number Diff line Loading @@ -199,8 +199,10 @@ static int cam_bps_handle_resume(struct cam_hw_info *bps_dev) cam_cpas_reg_read(core_info->cpas_handle, CAM_CPAS_REG_CPASTOP, hw_info->pwr_ctrl, true, &pwr_ctrl); if (pwr_ctrl & BPS_COLLAPSE_MASK) { CAM_ERR(CAM_ICP, "BPS: pwr_ctrl(%x)", pwr_ctrl); return -EINVAL; CAM_WARN(CAM_ICP, "BPS: pwr_ctrl set(%x)", pwr_ctrl); cam_cpas_reg_write(core_info->cpas_handle, CAM_CPAS_REG_CPASTOP, hw_info->pwr_ctrl, true, 0); } rc = cam_bps_transfer_gdsc_control(soc_info); Loading drivers/media/platform/msm/camera/cam_icp/icp_hw/ipe_hw/ipe_core.c +5 −2 Original line number Diff line number Diff line Loading @@ -195,9 +195,12 @@ static int cam_ipe_handle_resume(struct cam_hw_info *ipe_dev) CAM_CPAS_REG_CPASTOP, hw_info->pwr_ctrl, true, &pwr_ctrl); if (pwr_ctrl & IPE_COLLAPSE_MASK) { CAM_ERR(CAM_ICP, "IPE: resume failed : %d", pwr_ctrl); return -EINVAL; CAM_WARN(CAM_ICP, "IPE pwr_ctrl set(%x)", pwr_ctrl); cam_cpas_reg_write(core_info->cpas_handle, CAM_CPAS_REG_CPASTOP, hw_info->pwr_ctrl, true, 0); } rc = cam_ipe_transfer_gdsc_control(soc_info); cam_cpas_reg_read(core_info->cpas_handle, CAM_CPAS_REG_CPASTOP, hw_info->pwr_ctrl, true, &pwr_ctrl); Loading Loading
drivers/media/platform/msm/camera/cam_icp/icp_hw/bps_hw/bps_core.c +4 −2 Original line number Diff line number Diff line Loading @@ -199,8 +199,10 @@ static int cam_bps_handle_resume(struct cam_hw_info *bps_dev) cam_cpas_reg_read(core_info->cpas_handle, CAM_CPAS_REG_CPASTOP, hw_info->pwr_ctrl, true, &pwr_ctrl); if (pwr_ctrl & BPS_COLLAPSE_MASK) { CAM_ERR(CAM_ICP, "BPS: pwr_ctrl(%x)", pwr_ctrl); return -EINVAL; CAM_WARN(CAM_ICP, "BPS: pwr_ctrl set(%x)", pwr_ctrl); cam_cpas_reg_write(core_info->cpas_handle, CAM_CPAS_REG_CPASTOP, hw_info->pwr_ctrl, true, 0); } rc = cam_bps_transfer_gdsc_control(soc_info); Loading
drivers/media/platform/msm/camera/cam_icp/icp_hw/ipe_hw/ipe_core.c +5 −2 Original line number Diff line number Diff line Loading @@ -195,9 +195,12 @@ static int cam_ipe_handle_resume(struct cam_hw_info *ipe_dev) CAM_CPAS_REG_CPASTOP, hw_info->pwr_ctrl, true, &pwr_ctrl); if (pwr_ctrl & IPE_COLLAPSE_MASK) { CAM_ERR(CAM_ICP, "IPE: resume failed : %d", pwr_ctrl); return -EINVAL; CAM_WARN(CAM_ICP, "IPE pwr_ctrl set(%x)", pwr_ctrl); cam_cpas_reg_write(core_info->cpas_handle, CAM_CPAS_REG_CPASTOP, hw_info->pwr_ctrl, true, 0); } rc = cam_ipe_transfer_gdsc_control(soc_info); cam_cpas_reg_read(core_info->cpas_handle, CAM_CPAS_REG_CPASTOP, hw_info->pwr_ctrl, true, &pwr_ctrl); Loading