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Commit 9ae14005 authored by Mike Turquette's avatar Mike Turquette
Browse files

Merge tag 'qcom-clocks-for-3.17' of... 

Merge tag 'qcom-clocks-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/galak/linux-qcom into clk-next-msm

qcom clock changes for 3.17

These patches add support for a handful of Qualcomm's SoC clock
controllers: APQ8084 gcc and mmcc, IPQ8064 gcc, and APQ8064.
There's also a small collection of bug fixes that aren't critical
-rc worthy regressions because the consumer drivers aren't present
or using the buggy clocks and one optimization for HDMI.
parents 07761baf e216ce60

Documentation/devicetree/bindings/clock/qcom,gcc.txt

+2 −0
Original line number Diff line number Diff line
@@ -5,6 +5,8 @@ Required properties : 
- compatible : shall contain only one of the following:



			"qcom,gcc-apq8064"

			"qcom,gcc-apq8084"

			"qcom,gcc-ipq8064"

			"qcom,gcc-msm8660"

			"qcom,gcc-msm8960"

			"qcom,gcc-msm8974"

Documentation/devicetree/bindings/clock/qcom,mmcc.txt

+2 −0
Original line number Diff line number Diff line
@@ -4,6 +4,8 @@ Qualcomm Multimedia Clock & Reset Controller Binding 
Required properties :

- compatible : shall contain only one of the following:



			"qcom,mmcc-apq8064"

			"qcom,mmcc-apq8084"

			"qcom,mmcc-msm8660"

			"qcom,mmcc-msm8960"

			"qcom,mmcc-msm8974"

drivers/clk/qcom/Kconfig

+25 −0
Original line number Diff line number Diff line
@@ -4,6 +4,31 @@ config COMMON_CLK_QCOM 
	select REGMAP_MMIO

	select RESET_CONTROLLER



config APQ_GCC_8084

	tristate "APQ8084 Global Clock Controller"

	depends on COMMON_CLK_QCOM

	help

	  Support for the global clock controller on apq8084 devices.

	  Say Y if you want to use peripheral devices such as UART, SPI,

	  i2c, USB, SD/eMMC, SATA, PCIe, etc.



config APQ_MMCC_8084

	tristate "APQ8084 Multimedia Clock Controller"

	select APQ_GCC_8084

	depends on COMMON_CLK_QCOM

	help

	  Support for the multimedia clock controller on apq8084 devices.

	  Say Y if you want to support multimedia devices such as display,

	  graphics, video encode/decode, camera, etc.



config IPQ_GCC_806X

	tristate "IPQ806x Global Clock Controller"

	depends on COMMON_CLK_QCOM

	help

	  Support for the global clock controller on ipq806x devices.

	  Say Y if you want to use peripheral devices such as UART, SPI,

	  i2c, USB, SD/eMMC, etc.



config MSM_GCC_8660

	tristate "MSM8660 Global Clock Controller"

	depends on COMMON_CLK_QCOM

drivers/clk/qcom/Makefile

+3 −0
Original line number Diff line number Diff line
@@ -8,6 +8,9 @@ clk-qcom-y += clk-rcg2.o 
clk-qcom-y += clk-branch.o

clk-qcom-y += reset.o



obj-$(CONFIG_APQ_GCC_8084) += gcc-apq8084.o

obj-$(CONFIG_APQ_MMCC_8084) += mmcc-apq8084.o

obj-$(CONFIG_IPQ_GCC_806X) += gcc-ipq806x.o

obj-$(CONFIG_MSM_GCC_8660) += gcc-msm8660.o

obj-$(CONFIG_MSM_GCC_8960) += gcc-msm8960.o

obj-$(CONFIG_MSM_GCC_8974) += gcc-msm8974.o

drivers/clk/qcom/clk-pll.c

+12 −3
Original line number Diff line number Diff line
@@ -166,7 +166,7 @@ const struct clk_ops clk_pll_vote_ops = { 
EXPORT_SYMBOL_GPL(clk_pll_vote_ops);



static void

clk_pll_set_fsm_mode(struct clk_pll *pll, struct regmap *regmap)

clk_pll_set_fsm_mode(struct clk_pll *pll, struct regmap *regmap, u8 lock_count)

{

	u32 val;

	u32 mask;
@@ -175,7 +175,7 @@ clk_pll_set_fsm_mode(struct clk_pll *pll, struct regmap *regmap) 
	regmap_update_bits(regmap, pll->mode_reg, PLL_VOTE_FSM_RESET, 0);



	/* Program bias count and lock count */

	val = 1 << PLL_BIAS_COUNT_SHIFT;

	val = 1 << PLL_BIAS_COUNT_SHIFT | lock_count << PLL_LOCK_COUNT_SHIFT;

	mask = PLL_BIAS_COUNT_MASK << PLL_BIAS_COUNT_SHIFT;

	mask |= PLL_LOCK_COUNT_MASK << PLL_LOCK_COUNT_SHIFT;

	regmap_update_bits(regmap, pll->mode_reg, mask, val);
@@ -212,11 +212,20 @@ static void clk_pll_configure(struct clk_pll *pll, struct regmap *regmap, 
	regmap_update_bits(regmap, pll->config_reg, mask, val);

}



void clk_pll_configure_sr(struct clk_pll *pll, struct regmap *regmap,

		const struct pll_config *config, bool fsm_mode)

{

	clk_pll_configure(pll, regmap, config);

	if (fsm_mode)

		clk_pll_set_fsm_mode(pll, regmap, 8);

}

EXPORT_SYMBOL_GPL(clk_pll_configure_sr);



void clk_pll_configure_sr_hpm_lp(struct clk_pll *pll, struct regmap *regmap,

		const struct pll_config *config, bool fsm_mode)

{

	clk_pll_configure(pll, regmap, config);

	if (fsm_mode)

		clk_pll_set_fsm_mode(pll, regmap);

		clk_pll_set_fsm_mode(pll, regmap, 0);

}

EXPORT_SYMBOL_GPL(clk_pll_configure_sr_hpm_lp);