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Commit 9a9df21e authored by Vijayanand Jitta's avatar Vijayanand Jitta
Browse files

ARM: dts: qcom: Enable iommu bus voting for sm6150



Vote for the bus clock rate required to access iommu
registers on sm6150.

Change-Id: I23d898238b0fe3724a8c073d2a2e35988f3c590c
Signed-off-by: default avatarVijayanand Jitta <vjitta@codeaurora.org>
parent e5bb7552
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+78 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/msm/msm-bus-ids.h>

&soc {
	kgsl_smmu: kgsl-smmu@0x50a0000 {
@@ -138,6 +139,17 @@
				<GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>;
		qcom,msm-bus,name = "apps_smmu";
		qcom,msm-bus,num-cases = <2>;
		qcom,msm-bus,active-only;
		qcom,msm-bus,num-paths = <1>;
		qcom,msm-bus,vectors-KBps =
			<MSM_BUS_MASTER_GEM_NOC_SNOC>,
			<MSM_BUS_SLAVE_IMEM_CFG>,
			<0 0>,
			<MSM_BUS_MASTER_GEM_NOC_SNOC>,
			<MSM_BUS_SLAVE_IMEM_CFG>,
			<0 1000>;

		anoc_1_tbu: anoc_1_tbu@0x150c5000 {
			compatible = "qcom,qsmmuv500-tbu";
@@ -147,6 +159,17 @@
			qcom,stream-id-range = <0x0 0x400>;
			qcom,regulator-names = "vdd";
			vdd-supply = <&hlos1_vote_aggre_noc_mmu_tbu1_gdsc>;
			qcom,msm-bus,name = "apps_smmu";
			qcom,msm-bus,num-cases = <2>;
			qcom,msm-bus,active-only;
			qcom,msm-bus,num-paths = <1>;
			qcom,msm-bus,vectors-KBps =
				<MSM_BUS_MASTER_GEM_NOC_SNOC>,
				<MSM_BUS_SLAVE_IMEM_CFG>,
				<0 0>,
				<MSM_BUS_MASTER_GEM_NOC_SNOC>,
				<MSM_BUS_SLAVE_IMEM_CFG>,
				<0 1000>;
		};

		anoc_2_tbu: anoc_2_tbu@0x150c9000 {
@@ -157,6 +180,17 @@
			qcom,stream-id-range = <0x400 0x400>;
			qcom,regulator-names = "vdd";
			vdd-supply = <&hlos1_vote_aggre_noc_mmu_tbu2_gdsc>;
			qcom,msm-bus,name = "apps_smmu";
			qcom,msm-bus,num-cases = <2>;
			qcom,msm-bus,active-only;
			qcom,msm-bus,num-paths = <1>;
			qcom,msm-bus,vectors-KBps =
				<MSM_BUS_MASTER_GEM_NOC_SNOC>,
				<MSM_BUS_SLAVE_IMEM_CFG>,
				<0 0>,
				<MSM_BUS_MASTER_GEM_NOC_SNOC>,
				<MSM_BUS_SLAVE_IMEM_CFG>,
				<0 1000>;
		};

		mnoc_hf_0_tbu: mnoc_hf_0_tbu@0x150cd000 {
@@ -167,6 +201,17 @@
			qcom,stream-id-range = <0x800 0x400>;
			qcom,regulator-names = "vdd";
			vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc>;
			qcom,msm-bus,name = "mnoc_hf_0_tbu";
			qcom,msm-bus,num-cases = <2>;
			qcom,msm-bus,active-only;
			qcom,msm-bus,num-paths = <1>;
			qcom,msm-bus,vectors-KBps =
				<MSM_BUS_MASTER_MDP_PORT0>,
				<MSM_BUS_SLAVE_MNOC_HF_MEM_NOC>,
				<0 0>,
				<MSM_BUS_MASTER_MDP_PORT0>,
				<MSM_BUS_SLAVE_MNOC_HF_MEM_NOC>,
				<0 1000>;
		};

		mnoc_sf_0_tbu: mnoc_sf_0_tbu@0x150d1000 {
@@ -177,6 +222,17 @@
			qcom,stream-id-range = <0xc00 0x400>;
			qcom,regulator-names = "vdd";
			vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_sf_gdsc>;
			qcom,msm-bus,name = "mnoc_sf_0_tbu";
			qcom,msm-bus,num-cases = <2>;
			qcom,msm-bus,active-only;
			qcom,msm-bus,num-paths = <1>;
			qcom,msm-bus,vectors-KBps =
				<MSM_BUS_MASTER_CAMNOC_SF>,
				<MSM_BUS_SLAVE_MNOC_SF_MEM_NOC>,
				<0 0>,
				<MSM_BUS_MASTER_CAMNOC_SF>,
				<MSM_BUS_SLAVE_MNOC_SF_MEM_NOC>,
				<0 1000>;
		};

		compute_dsp_tbu: compute_dsp_tbu@0x150d5000 {
@@ -186,6 +242,17 @@
			reg-names = "base", "status-reg";
			qcom,stream-id-range = <0x1000 0x400>;
			/* No GDSC */
			qcom,msm-bus,name = "apps_smmu";
			qcom,msm-bus,num-cases = <2>;
			qcom,msm-bus,active-only;
			qcom,msm-bus,num-paths = <1>;
			qcom,msm-bus,vectors-KBps =
				<MSM_BUS_MASTER_GEM_NOC_SNOC>,
				<MSM_BUS_SLAVE_IMEM_CFG>,
				<0 0>,
				<MSM_BUS_MASTER_GEM_NOC_SNOC>,
				<MSM_BUS_SLAVE_IMEM_CFG>,
				<0 1000>;
		};

		adsp_tbu: adsp_tbu@0x150d9000 {
@@ -196,6 +263,17 @@
			qcom,stream-id-range = <0x1400 0x400>;
			qcom,regulator-names = "vdd";
			vdd-supply = <&hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc>;
			qcom,msm-bus,name = "apps_smmu";
			qcom,msm-bus,num-cases = <2>;
			qcom,msm-bus,active-only;
			qcom,msm-bus,num-paths = <1>;
			qcom,msm-bus,vectors-KBps =
				<MSM_BUS_MASTER_GEM_NOC_SNOC>,
				<MSM_BUS_SLAVE_IMEM_CFG>,
				<0 0>,
				<MSM_BUS_MASTER_GEM_NOC_SNOC>,
				<MSM_BUS_SLAVE_IMEM_CFG>,
				<0 1000>;
		};
	};