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Commit 9a7c7890 authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: set CB tuning also for the reduce clock



Since the ratio is different, we also need to pass in the parameters
for the reduced clock. Might or might not reduce flicker for the
auto-downclocking on lvds/eDP.

Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent f0b44056
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+7 −2
Original line number Diff line number Diff line
@@ -5469,7 +5469,8 @@ static void ironlake_fdi_set_m_n(struct drm_crtc *crtc)
}

static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
				      intel_clock_t *clock, u32 *fp)
				      intel_clock_t *clock, u32 *fp,
				      intel_clock_t *reduced_clock, u32 *fp2)
{
	struct drm_crtc *crtc = &intel_crtc->base;
	struct drm_device *dev = crtc->dev;
@@ -5511,6 +5512,9 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
	if (clock->m < factor * clock->n)
		*fp |= FP_CB_TUNE;

	if (fp2 && (reduced_clock->m < factor * reduced_clock->n))
		*fp2 |= FP_CB_TUNE;

	dpll = 0;

	if (is_lvds)
@@ -5626,7 +5630,8 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
		fp2 = reduced_clock.n << 16 | reduced_clock.m1 << 8 |
			reduced_clock.m2;

	dpll = ironlake_compute_dpll(intel_crtc, &clock, &fp);
	dpll = ironlake_compute_dpll(intel_crtc, &clock, &fp, &reduced_clock,
				     has_reduced_clock ? &fp2 : NULL);

	DRM_DEBUG_KMS("Mode for pipe %d:\n", pipe);
	drm_mode_debug_printmodeline(mode);