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Commit 99fca60c authored by Daniel Vetter's avatar Daniel Vetter
Browse files

drm/i915: fixup interlaced vertical timings confusion, part 2 



According to bspec, we need to subtract an additional line from vtotal
for interlaced modes and vblank_end needs to equal vtotal. All other
timing fields do not need this special treatment, so kill it.

Bspec says that this is irrespective of whether the interlaced mode
has an odd or even vtotal, both modes are supported.

Reviewed-by: default avatarEugeni Dodonov <eugeni.dodonov@intel.com>
Reviewed-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: default avatarPaulo Zanoni <paulo.r.zanoni@intel.com>
Tested-by: default avatarChristopher Egert <cme3000@gmail.com>
Tested-by: default avatarAlfonso Fiore <alfonso.fiore@gmail.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent ca9bfa7e

drivers/gpu/drm/i915/intel_display.c

+0 −8
Original line number Diff line number Diff line
@@ -5388,12 +5388,8 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc, 
	if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {

		pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;

		/* the chip adds 2 halflines automatically */

		adjusted_mode->crtc_vdisplay -= 1;

		adjusted_mode->crtc_vtotal -= 1;

		adjusted_mode->crtc_vblank_start -= 1;

		adjusted_mode->crtc_vblank_end -= 1;

		adjusted_mode->crtc_vsync_end -= 1;

		adjusted_mode->crtc_vsync_start -= 1;

	} else

		pipeconf |= PIPECONF_PROGRESSIVE;
@@ -5981,12 +5977,8 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc, 
	if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {

		pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;

		/* the chip adds 2 halflines automatically */

		adjusted_mode->crtc_vdisplay -= 1;

		adjusted_mode->crtc_vtotal -= 1;

		adjusted_mode->crtc_vblank_start -= 1;

		adjusted_mode->crtc_vblank_end -= 1;

		adjusted_mode->crtc_vsync_end -= 1;

		adjusted_mode->crtc_vsync_start -= 1;

	} else

		pipeconf |= PIPECONF_PROGRESSIVE;