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Commit 9986db28 authored by Jilai Wang's avatar Jilai Wang
Browse files

ARM: dts: msm: Update NPU clock frequency settings for sm8150 v2 



Add one power level to increase the total power level count
to 6 and update clock frequency settings in each power level.

Change-Id: Id5afed77a23242b8eb83f7917ecfad7eb44a6c27
Signed-off-by: default avatarJilai Wang <jilaiw@codeaurora.org>
parent 4f1e2f62

arch/arm64/boot/dts/qcom/sm8150-v2.dtsi

+27 −5
Original line number Diff line number Diff line
@@ -437,7 +437,7 @@ 
		#address-cells = <1>;

		#size-cells = <0>;

		compatible = "qcom,npu-pwrlevels";

		initial-pwrlevel = <3>;

		initial-pwrlevel = <5>;

		qcom,npu-pwrlevel@0 {

			reg = <0>;

			clk-freq = <300000000
@@ -509,12 +509,12 @@ 
		};

		qcom,npu-pwrlevel@3 {

			reg = <3>;

			clk-freq = <773000000

			clk-freq = <652000000

					19200000

					300000000

					19200000

					19200000

					773000000

					652000000

					403000000

					75000000

					19200000
@@ -523,7 +523,7 @@ 
					150000000

					300000000

					19200000

					773000000

					652000000

					19200000

					0

					0
@@ -532,6 +532,29 @@ 
		};

		qcom,npu-pwrlevel@4 {

			reg = <4>;

			clk-freq = <811000000

					19200000

					400000000

					19200000

					19200000

					811000000

					533000000

					75000000

					19200000

					300000000

					400000000

					150000000

					400000000

					19200000

					811000000

					19200000

					0

					0

					0

					0>;

		};

		qcom,npu-pwrlevel@5 {

			reg = <5>;

			clk-freq = <908000000

					19200000

					400000000
@@ -553,7 +576,6 @@ 
					0

					0>;

		};

		/delete-node/ qcom,npu-pwrlevel@5;

	};

};