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Commit 991688bf authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull ARM SoC driver updates from Arnd Bergmann:
 "Driver updates for ARM SoCs, including a couple of newly added
  drivers:

   - A new driver for the power management controller on TI Keystone

   - Support for the prerelease "SCPI" firmware protocol that ended up
     being shipped by Amlogic in their GXBB SoC.

   - A soc_device can now be matched using a glob from inside the
     kernel, when another driver wants to know the specific chip it is
     running on and cannot find out from DT, firmware or hardware.

   - Renesas SoCs now support identification through the soc_device
     interface, both in user space and kernel.

   - Renesas r8a7743 and r8a7745 gain support for their system
     controller

   - A new checking module for the ARM "PSCI" (not to be confused with
     "SCPI" mentioned above) firmware interface.

   - A new driver for the Tegra GMI memory interface

   - Support for the Tegra firmware interfaces with their power
     management controllers

  As usual, the updates for the reset controller framework are merged
  here, as they tend to touch multiple SoCs as well, including a new
  driver for the Oxford (now Broadcom) OX820 chip and the Tegra bpmp
  interface.

  The existing drivers for Atmel, Qualcomm, NVIDIA, TI Davinci, and
  Rockchips SoCs see some further updates"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (76 commits)
  misc: sram: remove useless #ifdef
  drivers: psci: Allow PSCI node to be disabled
  drivers: psci: PSCI checker module
  soc: renesas: Identify SoC and register with the SoC bus
  firmware: qcom: scm: Return PTR_ERR when devm_clk_get fails
  firmware: qcom: scm: Remove core, iface and bus clocks dependency
  dt-bindings: firmware: scm: Add MSM8996 DT bindings
  memory: da8xx-ddrctl: drop the call to of_flat_dt_get_machine_name()
  bus: da8xx-mstpri: drop the call to of_flat_dt_get_machine_name()
  ARM: shmobile: Document DT bindings for Product Register
  soc: renesas: rcar-sysc: add R8A7745 support
  reset: Add Tegra BPMP reset driver
  dt-bindings: firmware: Allow child nodes inside the Tegra BPMP
  dt-bindings: Add power domains to Tegra BPMP firmware
  firmware: tegra: Add BPMP support
  firmware: tegra: Add IVC library
  dt-bindings: firmware: Add bindings for Tegra BPMP
  mailbox: tegra-hsp: Use after free in tegra_hsp_remove_doorbells()
  mailbox: Add Tegra HSP driver
  firmware: arm_scpi: add support for pre-v1.0 SCPI compatible
  ...
parents 482c3e88 2ada9593
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+20 −0
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System Control and Power Interface (SCPI) Message Protocol
(in addition to the standard binding in [0])
----------------------------------------------------------
Required properties

- compatible : should be "amlogic,meson-gxbb-scpi"

AMLOGIC SRAM and Shared Memory for SCPI
------------------------------------

Required properties:
- compatible : should be "amlogic,meson-gxbb-sram"

Each sub-node represents the reserved area for SCPI.

Required sub-node properties:
- compatible : should be "amlogic,meson-gxbb-scp-shmem" for SRAM based shared
		memory on Amlogic GXBB SoC.

[0] Documentation/devicetree/bindings/arm/arm,scpi.txt
+11 −14
Original line number Diff line number Diff line
@@ -7,7 +7,10 @@ by Linux to initiate various system control and power operations.

Required properties:

- compatible : should be "arm,scpi"
- compatible : should be
	* "arm,scpi" : For implementations complying to SCPI v1.0 or above
	* "arm,scpi-pre-1.0" : For implementations complying to all
		unversioned releases prior to SCPI v1.0
- mboxes: List of phandle and mailbox channel specifiers
	  All the channels reserved by remote SCP firmware for use by
	  SCPI message protocol should be specified in any order
@@ -59,18 +62,14 @@ SRAM and Shared Memory for SCPI
A small area of SRAM is reserved for SCPI communication between application
processors and SCP.

Required properties:
- compatible : should be "arm,juno-sram-ns" for Non-secure SRAM on Juno

The rest of the properties should follow the generic mmio-sram description
found in ../../sram/sram.txt
The properties should follow the generic mmio-sram description found in [3]

Each sub-node represents the reserved area for SCPI.

Required sub-node properties:
- reg : The base offset and size of the reserved area with the SRAM
- compatible : should be "arm,juno-scp-shmem" for Non-secure SRAM based
	       shared memory on Juno platforms
- compatible : should be "arm,scp-shmem" for Non-secure SRAM based
	       shared memory

Sensor bindings for the sensors based on SCPI Message Protocol
--------------------------------------------------------------
@@ -81,11 +80,9 @@ Required properties:
- #thermal-sensor-cells: should be set to 1. This property follows the
			 thermal device tree bindings[2].

			 Valid cell values are raw identifiers (Sensor
			 ID) as used by the firmware. Refer to
			 platform documentation for your
			 implementation for the IDs to use. For Juno
			 R0 and Juno R1 refer to [3].
			 Valid cell values are raw identifiers (Sensor ID)
			 as used by the firmware. Refer to  platform details
			 for your implementation for the IDs to use.

Power domain bindings for the power domains based on SCPI Message Protocol
------------------------------------------------------------
@@ -112,7 +109,7 @@ Required properties:
[0] http://infocenter.arm.com/help/topic/com.arm.doc.dui0922b/index.html
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
[2] Documentation/devicetree/bindings/thermal/thermal.txt
[3] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0922b/apas03s22.html
[3] Documentation/devicetree/bindings/sram/sram.txt
[4] Documentation/devicetree/bindings/power/power_domain.txt

Example:
+16 −0
Original line number Diff line number Diff line
@@ -225,3 +225,19 @@ required properties:
		compatible = "atmel,sama5d3-sfr", "syscon";
		reg = <0xf0038000 0x60>;
	};

Security Module (SECUMOD)

The Security Module macrocell provides all necessary secure functions to avoid
voltage, temperature, frequency and mechanical attacks on the chip. It also
embeds secure memories that can be scrambled

required properties:
- compatible: Should be "atmel,<chip>-secumod", "syscon".
  <chip> can be "sama5d2".
- reg: Should contain registers location and length

	secumod@fc040000 {
		compatible = "atmel,sama5d2-secumod", "syscon";
		reg = <0xfc040000 0x100>;
	};
+26 −0
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System Control and Power Interface (SCPI) Message Protocol
(in addition to the standard binding in [0])

Juno SRAM and Shared Memory for SCPI
------------------------------------

Required properties:
- compatible : should be "arm,juno-sram-ns" for Non-secure SRAM

Each sub-node represents the reserved area for SCPI.

Required sub-node properties:
- reg : The base offset and size of the reserved area with the SRAM
- compatible : should be "arm,juno-scp-shmem" for Non-secure SRAM based
	       shared memory on Juno platforms

Sensor bindings for the sensors based on SCPI Message Protocol
--------------------------------------------------------------
Required properties:
- compatible : should be "arm,scpi-sensors".
- #thermal-sensor-cells: should be set to 1.
			 For Juno R0 and Juno R1 refer to [1] for the
			 sensor identifiers

[0] Documentation/devicetree/bindings/arm/arm,scpi.txt
[1] http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0922b/apas03s22.html
+81 −0
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Texas Instruments System Control Interface (TI-SCI) Message Protocol
--------------------------------------------------------------------

Texas Instrument's processors including those belonging to Keystone generation
of processors have separate hardware entity which is now responsible for the
management of the System on Chip (SoC) system. These include various system
level functions as well.

An example of such an SoC is K2G, which contains the system control hardware
block called Power Management Micro Controller (PMMC). This hardware block is
initialized early into boot process and provides services to Operating Systems
on multiple processors including ones running Linux.

See http://processors.wiki.ti.com/index.php/TISCI for protocol definition.

TI-SCI controller Device Node:
=============================

The TI-SCI node describes the Texas Instrument's System Controller entity node.
This parent node may optionally have additional children nodes which describe
specific functionality such as clocks, power domain, reset or additional
functionality as may be required for the SoC. This hierarchy also describes the
relationship between the TI-SCI parent node to the child node.

Required properties:
-------------------
- compatible: should be "ti,k2g-sci"
- mbox-names:
	"rx" - Mailbox corresponding to receive path
	"tx" - Mailbox corresponding to transmit path

- mboxes: Mailboxes corresponding to the mbox-names. Each value of the mboxes
	  property should contain a phandle to the mailbox controller device
	  node and an args specifier that will be the phandle to the intended
	  sub-mailbox child node to be used for communication.

See Documentation/devicetree/bindings/mailbox/mailbox.txt for more details
about the generic mailbox controller and client driver bindings. Also see
Documentation/devicetree/bindings/mailbox/ti,message-manager.txt for typical
controller that is used to communicate with this System controllers.

Optional Properties:
-------------------
- reg-names:
	debug_messages - Map the Debug message region
- reg:  register space corresponding to the debug_messages
- ti,system-reboot-controller: If system reboot can be triggered by SoC reboot

Example (K2G):
-------------
	pmmc: pmmc {
		compatible = "ti,k2g-sci";
		mbox-names = "rx", "tx";
		mboxes= <&msgmgr &msgmgr_proxy_pmmc_rx>,
			<&msgmgr &msgmgr_proxy_pmmc_tx>;
		reg-names = "debug_messages";
		reg = <0x02921800 0x800>;
	};


TI-SCI Client Device Node:
=========================

Client nodes are maintained as children of the relevant TI-SCI device node.

Example (K2G):
-------------
	pmmc: pmmc {
		compatible = "ti,k2g-sci";
		...

		my_clk_node: clk_node {
			...
			...
		};

		my_pd_node: pd_node {
			...
			...
		};
	};
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