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Commit 988fc47f authored by Subbaraman Narayanamurthy's avatar Subbaraman Narayanamurthy
Browse files

power: qpnp-fg-gen4: Add support for configuring more Ki coefficients 



Currently, GEN4 FG driver supports configuring Ki coefficients
for medium and high discharging conditions based on the SOC
thresholds. In addition, add support to configure Ki coefficients
for low discharging conditions based on SOC thresholds. Also, add
support to configure Ki coefficients for low, medium and high
charging conditions one time during HW initialization based on
the device tree property.

Change-Id: I8e72bb19f594ac072b4df37d1433b8676c85e5b4
Signed-off-by: default avatarSubbaraman Narayanamurthy <subbaram@codeaurora.org>
parent 92bd16b5

Documentation/devicetree/bindings/power/supply/qcom/qpnp-fg-gen4.txt

+32 −0
Original line number Diff line number Diff line
@@ -229,6 +229,17 @@ First Level Node - FG Gen4 device 
		    This should be defined in the ascending order and in the

		    range of 0-100. Array limit is set to 3.



- qcom,ki-coeff-low-dischg

	Usage:      optional

	Value type: <prop-encoded-array>

	Definition: Array of ki coefficient values for low discharge current

		    during discharge. These values will be applied when the

		    monotonic SOC goes below the SOC threshold specified under

		    qcom,ki-coeff-soc-dischg. Array limit is set to 3. This

		    property should be specified if qcom,ki-coeff-soc-dischg

		    is specified to make it fully functional. Value has no

		    unit. Allowed range is 62 to 15564 in micro units.



- qcom,ki-coeff-med-dischg

	Usage:      optional

	Value type: <prop-encoded-array>
@@ -251,6 +262,27 @@ First Level Node - FG Gen4 device 
		    is specified to make it fully functional. Value has no

		    unit. Allowed range is 62 to 15564 in micro units.



- qcom,ki-coeff-low-chg

	Usage:      optional

	Value type: <u32>

	Definition: ki coefficient value for low charge current during

		    charging. Value has no unit. Allowed range is 62 to 15564

		    in micro units.



- qcom,ki-coeff-med-chg

	Usage:      optional

	Value type: <u32>

	Definition: ki coefficient value for medium charge current during

		    charging. Value has no unit. Allowed range is 62 to 15564

		    in micro units.



- qcom,ki-coeff-hi-chg

	Usage:      optional

	Value type: <u32>

	Definition: ki coefficient value for high charge current during

		    charging. Value has no unit. Allowed range is 62 to 15564

		    in micro units.



- qcom,fg-rconn-uohms

	Usage:      optional

	Value type: <u32>

drivers/power/supply/qcom/fg-core.h

+4 −0
Original line number Diff line number Diff line
@@ -190,8 +190,12 @@ enum fg_sram_param_id { 
	FG_SRAM_DELTA_BSOC_THR,

	FG_SRAM_RECHARGE_SOC_THR,

	FG_SRAM_RECHARGE_VBATT_THR,

	FG_SRAM_KI_COEFF_LOW_DISCHG,

	FG_SRAM_KI_COEFF_MED_DISCHG,

	FG_SRAM_KI_COEFF_HI_DISCHG,

	FG_SRAM_KI_COEFF_LOW_CHG,

	FG_SRAM_KI_COEFF_MED_CHG,

	FG_SRAM_KI_COEFF_HI_CHG,

	FG_SRAM_KI_COEFF_FULL_SOC,

	FG_SRAM_ESR_TIGHT_FILTER,

	FG_SRAM_ESR_BROAD_FILTER,

drivers/power/supply/qcom/qpnp-fg-gen4.c

+127 −14
Original line number Diff line number Diff line
@@ -67,10 +67,18 @@ 
#define SYS_TERM_CURR_OFFSET		0

#define VBATT_FULL_WORD			23

#define VBATT_FULL_OFFSET		0

#define KI_COEFF_LOW_DISCHG_WORD	25

#define KI_COEFF_LOW_DISCHG_OFFSET	1

#define KI_COEFF_MED_DISCHG_WORD	26

#define KI_COEFF_MED_DISCHG_OFFSET	0

#define KI_COEFF_HI_DISCHG_WORD		26

#define KI_COEFF_HI_DISCHG_OFFSET	1

#define KI_COEFF_LOW_CHG_WORD		28

#define KI_COEFF_LOW_CHG_OFFSET		0

#define KI_COEFF_MED_CHG_WORD		28

#define KI_COEFF_MED_CHG_OFFSET		1

#define KI_COEFF_HI_CHG_WORD		29

#define KI_COEFF_HI_CHG_OFFSET		0

#define DELTA_BSOC_THR_WORD		30

#define DELTA_BSOC_THR_OFFSET		1

#define SLOPE_LIMIT_WORD		32
@@ -134,7 +142,11 @@ struct fg_dt_props { 
	int	esr_pulse_thresh_ma;

	int	esr_meas_curr_ma;

	int	slope_limit_temp;

	int	ki_coeff_low_chg;

	int	ki_coeff_med_chg;

	int	ki_coeff_hi_chg;

	int	ki_coeff_soc[KI_COEFF_SOC_LEVELS];

	int	ki_coeff_low_dischg[KI_COEFF_SOC_LEVELS];

	int	ki_coeff_med_dischg[KI_COEFF_SOC_LEVELS];

	int	ki_coeff_hi_dischg[KI_COEFF_SOC_LEVELS];

	int	slope_limit_coeffs[SLOPE_LIMIT_NUM_COEFFS];
@@ -223,12 +235,21 @@ static struct fg_sram_param pm8150_sram_params[] = { 
		ESR_TIMER_CHG_INIT_OFFSET, 1, 1, 1, 0, fg_encode_default, NULL),

	PARAM(ESR_PULSE_THRESH, ESR_PULSE_THRESH_WORD, ESR_PULSE_THRESH_OFFSET,

		1, 1000, 15625, 0, fg_encode_default, NULL),

	PARAM(KI_COEFF_LOW_DISCHG, KI_COEFF_LOW_DISCHG_WORD,

		KI_COEFF_LOW_DISCHG_OFFSET, 1, 1000, 61035, 0,

		fg_encode_default, NULL),

	PARAM(KI_COEFF_MED_DISCHG, KI_COEFF_MED_DISCHG_WORD,

		KI_COEFF_MED_DISCHG_OFFSET, 1, 1000, 61035, 0,

		fg_encode_default, NULL),

	PARAM(KI_COEFF_HI_DISCHG, KI_COEFF_HI_DISCHG_WORD,

		KI_COEFF_HI_DISCHG_OFFSET, 1, 1000, 61035, 0,

		fg_encode_default, NULL),

	PARAM(KI_COEFF_LOW_CHG, KI_COEFF_LOW_CHG_WORD, KI_COEFF_LOW_CHG_OFFSET,

		1, 1000, 61035, 0, fg_encode_default, NULL),

	PARAM(KI_COEFF_MED_CHG, KI_COEFF_MED_CHG_WORD, KI_COEFF_MED_CHG_OFFSET,

		1, 1000, 61035, 0, fg_encode_default, NULL),

	PARAM(KI_COEFF_HI_CHG, KI_COEFF_HI_CHG_WORD, KI_COEFF_HI_CHG_OFFSET, 1,

		1000, 61035, 0, fg_encode_default, NULL),

	PARAM(SLOPE_LIMIT, SLOPE_LIMIT_WORD, SLOPE_LIMIT_OFFSET, 1, 8192,

		1000000, 0, fg_encode_default, NULL),

	PARAM(BATT_TEMP_COLD, BATT_TEMP_CONFIG_WORD, BATT_TEMP_COLD_OFFSET, 1,
@@ -670,12 +691,14 @@ static int fg_gen4_store_count(void *data, u16 *buf, int id, int length) 


/* All worker and helper functions below */



#define KI_COEFF_LOW_DISCHG_DEFAULT	428

#define KI_COEFF_MED_DISCHG_DEFAULT	245

#define KI_COEFF_HI_DISCHG_DEFAULT	123

static int fg_gen4_adjust_ki_coeff_dischg(struct fg_dev *fg)

{

	struct fg_gen4_chip *chip = container_of(fg, struct fg_gen4_chip, fg);

	int rc, i, msoc;

	int ki_coeff_low = KI_COEFF_LOW_DISCHG_DEFAULT;

	int ki_coeff_med = KI_COEFF_MED_DISCHG_DEFAULT;

	int ki_coeff_hi = KI_COEFF_HI_DISCHG_DEFAULT;

	u8 val;
@@ -692,13 +715,31 @@ static int fg_gen4_adjust_ki_coeff_dischg(struct fg_dev *fg) 
	if (fg->charge_status == POWER_SUPPLY_STATUS_DISCHARGING) {

		for (i = KI_COEFF_SOC_LEVELS - 1; i >= 0; i--) {

			if (msoc < chip->dt.ki_coeff_soc[i]) {

				ki_coeff_low = chip->dt.ki_coeff_low_dischg[i];

				ki_coeff_med = chip->dt.ki_coeff_med_dischg[i];

				ki_coeff_hi = chip->dt.ki_coeff_hi_dischg[i];

			}

		}

	}



	fg_encode(fg->sp, FG_SRAM_KI_COEFF_MED_DISCHG, ki_coeff_med, &val);

	if (ki_coeff_low > 0) {

		fg_encode(fg->sp, FG_SRAM_KI_COEFF_LOW_DISCHG, ki_coeff_low,

			&val);

		rc = fg_sram_write(fg,

			fg->sp[FG_SRAM_KI_COEFF_LOW_DISCHG].addr_word,

			fg->sp[FG_SRAM_KI_COEFF_LOW_DISCHG].addr_byte, &val,

			fg->sp[FG_SRAM_KI_COEFF_LOW_DISCHG].len,

			FG_IMA_DEFAULT);

		if (rc < 0) {

			pr_err("Error in writing ki_coeff_low, rc=%d\n", rc);

			return rc;

		}

		fg_dbg(fg, FG_STATUS, "Wrote ki_coeff_low %d\n", ki_coeff_low);

	}



	if (ki_coeff_med > 0) {

		fg_encode(fg->sp, FG_SRAM_KI_COEFF_MED_DISCHG, ki_coeff_med,

			&val);

		rc = fg_sram_write(fg,

			fg->sp[FG_SRAM_KI_COEFF_MED_DISCHG].addr_word,

			fg->sp[FG_SRAM_KI_COEFF_MED_DISCHG].addr_byte, &val,
@@ -708,8 +749,12 @@ static int fg_gen4_adjust_ki_coeff_dischg(struct fg_dev *fg) 
			pr_err("Error in writing ki_coeff_med, rc=%d\n", rc);

			return rc;

		}

		fg_dbg(fg, FG_STATUS, "Wrote ki_coeff_med %d\n", ki_coeff_med);

	}



	fg_encode(fg->sp, FG_SRAM_KI_COEFF_HI_DISCHG, ki_coeff_hi, &val);

	if (ki_coeff_hi > 0) {

		fg_encode(fg->sp, FG_SRAM_KI_COEFF_HI_DISCHG, ki_coeff_hi,

			&val);

		rc = fg_sram_write(fg,

			fg->sp[FG_SRAM_KI_COEFF_HI_DISCHG].addr_word,

			fg->sp[FG_SRAM_KI_COEFF_HI_DISCHG].addr_byte, &val,
@@ -719,9 +764,9 @@ static int fg_gen4_adjust_ki_coeff_dischg(struct fg_dev *fg) 
			pr_err("Error in writing ki_coeff_hi, rc=%d\n", rc);

			return rc;

		}

		fg_dbg(fg, FG_STATUS, "Wrote ki_coeff_hi %d\n", ki_coeff_hi);

	}



	fg_dbg(fg, FG_STATUS, "Wrote ki_coeff_med %d ki_coeff_hi %d\n",

		ki_coeff_med, ki_coeff_hi);

	return 0;

}
@@ -2817,6 +2862,50 @@ static int fg_gen4_hw_init(struct fg_gen4_chip *chip) 
		}

	}



	if (chip->dt.ki_coeff_low_chg != -EINVAL) {

		fg_encode(fg->sp, FG_SRAM_KI_COEFF_LOW_CHG,

			chip->dt.ki_coeff_low_chg, &val);

		rc = fg_sram_write(fg,

			fg->sp[FG_SRAM_KI_COEFF_LOW_CHG].addr_word,

			fg->sp[FG_SRAM_KI_COEFF_LOW_CHG].addr_byte, &val,

			fg->sp[FG_SRAM_KI_COEFF_LOW_CHG].len,

			FG_IMA_DEFAULT);

		if (rc < 0) {

			pr_err("Error in writing ki_coeff_low_chg, rc=%d\n",

				rc);

			return rc;

		}

	}



	if (chip->dt.ki_coeff_med_chg != -EINVAL) {

		fg_encode(fg->sp, FG_SRAM_KI_COEFF_MED_CHG,

			chip->dt.ki_coeff_med_chg, &val);

		rc = fg_sram_write(fg,

			fg->sp[FG_SRAM_KI_COEFF_MED_CHG].addr_word,

			fg->sp[FG_SRAM_KI_COEFF_MED_CHG].addr_byte, &val,

			fg->sp[FG_SRAM_KI_COEFF_MED_CHG].len,

			FG_IMA_DEFAULT);

		if (rc < 0) {

			pr_err("Error in writing ki_coeff_med_chg, rc=%d\n",

				rc);

			return rc;

		}

	}



	if (chip->dt.ki_coeff_hi_chg != -EINVAL) {

		fg_encode(fg->sp, FG_SRAM_KI_COEFF_HI_CHG,

			chip->dt.ki_coeff_hi_chg, &val);

		rc = fg_sram_write(fg,

			fg->sp[FG_SRAM_KI_COEFF_HI_CHG].addr_word,

			fg->sp[FG_SRAM_KI_COEFF_HI_CHG].addr_byte, &val,

			fg->sp[FG_SRAM_KI_COEFF_HI_CHG].len,

			FG_IMA_DEFAULT);

		if (rc < 0) {

			pr_err("Error in writing ki_coeff_hi_chg, rc=%d\n", rc);

			return rc;

		}

	}



	rc = restore_cycle_count(chip->counter);

	if (rc < 0) {

		pr_err("Error in restoring cycle_count, rc=%d\n", rc);
@@ -2889,9 +2978,22 @@ static int fg_parse_ki_coefficients(struct fg_dev *fg) 
	struct device_node *node = fg->dev->of_node;

	int rc, i;



	chip->dt.ki_coeff_low_chg = -EINVAL;

	of_property_read_u32(node, "qcom,ki-coeff-low-chg",

		&chip->dt.ki_coeff_low_chg);



	chip->dt.ki_coeff_med_chg = -EINVAL;

	of_property_read_u32(node, "qcom,ki-coeff-med-chg",

		&chip->dt.ki_coeff_med_chg);



	chip->dt.ki_coeff_hi_chg = -EINVAL;

	of_property_read_u32(node, "qcom,ki-coeff-hi-chg",

		&chip->dt.ki_coeff_hi_chg);



	if (!of_find_property(node, "qcom,ki-coeff-soc-dischg", NULL) ||

		!of_find_property(node, "qcom,ki-coeff-med-dischg", NULL) ||

		!of_find_property(node, "qcom,ki-coeff-hi-dischg", NULL))

		(!of_find_property(node, "qcom,ki-coeff-low-dischg", NULL) &&

		!of_find_property(node, "qcom,ki-coeff-med-dischg", NULL) &&

		!of_find_property(node, "qcom,ki-coeff-hi-dischg", NULL)))

		return 0;



	rc = fg_parse_dt_property_u32_array(node, "qcom,ki-coeff-soc-dischg",
@@ -2899,6 +3001,11 @@ static int fg_parse_ki_coefficients(struct fg_dev *fg) 
	if (rc < 0)

		return rc;



	rc = fg_parse_dt_property_u32_array(node, "qcom,ki-coeff-low-dischg",

		chip->dt.ki_coeff_low_dischg, KI_COEFF_SOC_LEVELS);

	if (rc < 0)

		return rc;



	rc = fg_parse_dt_property_u32_array(node, "qcom,ki-coeff-med-dischg",

		chip->dt.ki_coeff_med_dischg, KI_COEFF_SOC_LEVELS);

	if (rc < 0)
@@ -2916,6 +3023,12 @@ static int fg_parse_ki_coefficients(struct fg_dev *fg) 
			return -EINVAL;

		}



		if (chip->dt.ki_coeff_low_dischg[i] < 0 ||

			chip->dt.ki_coeff_low_dischg[i] > KI_COEFF_MAX) {

			pr_err("Error in ki_coeff_low_dischg values\n");

			return -EINVAL;

		}



		if (chip->dt.ki_coeff_med_dischg[i] < 0 ||

			chip->dt.ki_coeff_med_dischg[i] > KI_COEFF_MAX) {

			pr_err("Error in ki_coeff_med_dischg values\n");