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Commit 9882d4e4 authored by Runmin Wang's avatar Runmin Wang
Browse files

ARM: dts: msm: Add support for CDSP PIL on sdm855



Add devicetree node for CDSP PIL which facilitates the loading of
CDSP firmware, authentication and bringing it out of reset.

Change-Id: I5088b3ebcc2f230cb318c0a853763cb580116335
Signed-off-by: default avatarRunmin Wang <runminw@codeaurora.org>
parent 058ea568
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+38 −0
Original line number Diff line number Diff line
@@ -715,6 +715,44 @@
		qcom,spss-scsr-bits = <24 25>;
	};

	qcom,turing@8300000 {
		compatible = "qcom,pil-tz-generic";
		reg = <0x8300000 0x100000>;

		vdd_cx-supply = <&pm855l_s6_level>;
		qcom,proxy-reg-names = "vdd_cx";
		qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>;

		clocks = <&clock_rpmh RPMH_CXO_CLK>;
		clock-names = "xo";
		qcom,proxy-clock-names = "xo";

		qcom,pas-id = <18>;
		qcom,proxy-timeout-ms = <10000>;
		qcom,smem-id = <601>;
		qcom,sysmon-id = <7>;
		qcom,ssctl-instance-id = <0x17>;
		qcom,firmware-name = "cdsp";
		memory-region = <&pil_cdsp_mem>;

		/* Inputs from turing */
		interrupts-extended = <&intc 0 578 1>,
				<&cdsp_smp2p_in 2 0>,
				<&cdsp_smp2p_in 1 0>,
				<&cdsp_smp2p_in 3 0>,
				<&cdsp_smp2p_in 0 0>;

		interrupt-names = "qcom,wdog",
				"qcom,err-fatal",
				"qcom,proxy-unvote",
				"qcom,err-ready",
				"qcom,stop-ack";

		/* Outputs from turing */
		qcom,smem-states = <&cdsp_smp2p_out 0>;
		qcom,smem-state-names = "qcom,force-stop";
	};

	kryo-erp {
		compatible = "arm,arm64-kryo-cpu-erp";
		interrupts = <1 6 4>,