Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 97cefc3e authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-fixes-3.16' of git://people.freedesktop.org/~agd5f/linux into drm-fixes 

two more radeon fixes.

* 'drm-fixes-3.16' of git://people.freedesktop.org/~agd5f/linux:
  drm/radeon: fix irq ring buffer overflow handling
  drm/radeon: fix error handling in radeon_vm_bo_set_addr
parents 9d6ed3c6 e8c214d2

drivers/gpu/drm/radeon/cik.c

+1 −0
Original line number Diff line number Diff line
@@ -7376,6 +7376,7 @@ static inline u32 cik_get_ih_wptr(struct radeon_device *rdev) 
		tmp = RREG32(IH_RB_CNTL);

		tmp |= IH_WPTR_OVERFLOW_CLEAR;

		WREG32(IH_RB_CNTL, tmp);

		wptr &= ~RB_OVERFLOW;

	}

	return (wptr & rdev->ih.ptr_mask);

}

drivers/gpu/drm/radeon/evergreen.c

+1 −0
Original line number Diff line number Diff line
@@ -4756,6 +4756,7 @@ static u32 evergreen_get_ih_wptr(struct radeon_device *rdev) 
		tmp = RREG32(IH_RB_CNTL);

		tmp |= IH_WPTR_OVERFLOW_CLEAR;

		WREG32(IH_RB_CNTL, tmp);

		wptr &= ~RB_OVERFLOW;

	}

	return (wptr & rdev->ih.ptr_mask);

}

drivers/gpu/drm/radeon/r600.c

+1 −0
Original line number Diff line number Diff line
@@ -3795,6 +3795,7 @@ static u32 r600_get_ih_wptr(struct radeon_device *rdev) 
		tmp = RREG32(IH_RB_CNTL);

		tmp |= IH_WPTR_OVERFLOW_CLEAR;

		WREG32(IH_RB_CNTL, tmp);

		wptr &= ~RB_OVERFLOW;

	}

	return (wptr & rdev->ih.ptr_mask);

}

drivers/gpu/drm/radeon/radeon_vm.c

+4 −0
Original line number Diff line number Diff line
@@ -472,6 +472,10 @@ int radeon_vm_bo_set_addr(struct radeon_device *rdev, 
	if (bo_va->soffset) {

		/* add a clone of the bo_va to clear the old address */

		tmp = kzalloc(sizeof(struct radeon_bo_va), GFP_KERNEL);

		if (!tmp) {

			mutex_unlock(&vm->mutex);

			return -ENOMEM;

		}

		tmp->soffset = bo_va->soffset;

		tmp->eoffset = bo_va->eoffset;

		tmp->vm = vm;

drivers/gpu/drm/radeon/si.c

+1 −0
Original line number Diff line number Diff line
@@ -6103,6 +6103,7 @@ static inline u32 si_get_ih_wptr(struct radeon_device *rdev) 
		tmp = RREG32(IH_RB_CNTL);

		tmp |= IH_WPTR_OVERFLOW_CLEAR;

		WREG32(IH_RB_CNTL, tmp);

		wptr &= ~RB_OVERFLOW;

	}

	return (wptr & rdev->ih.ptr_mask);

}