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Commit 977db65c authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "msm: kgsl: Snapshot the correct amount of CP ROQ data"

parents edc86270 a4da3d29

drivers/gpu/msm/adreno_a6xx.c

+3 −4
Original line number Diff line number Diff line
@@ -810,7 +810,7 @@ static void a6xx_start(struct adreno_device *adreno_dev) 
		kgsl_regwrite(device, A6XX_CP_ROQ_THRESHOLDS_2, 0x02000140);

		kgsl_regwrite(device, A6XX_CP_ROQ_THRESHOLDS_1, 0x8040362C);

	} else if (adreno_is_a608(adreno_dev)) {

		kgsl_regwrite(device, A6XX_CP_ROQ_THRESHOLDS_2, 0x800060);

		kgsl_regwrite(device, A6XX_CP_ROQ_THRESHOLDS_2, 0x00800060);

		kgsl_regwrite(device, A6XX_CP_ROQ_THRESHOLDS_1, 0x40201b16);

	} else {

		kgsl_regwrite(device, A6XX_CP_ROQ_THRESHOLDS_2, 0x010000C0);
@@ -819,9 +819,9 @@ static void a6xx_start(struct adreno_device *adreno_dev) 


	/* For a608 Mem pool size is reduced to 1/4 */

	if (adreno_is_a608(adreno_dev))

		kgsl_regwrite(device, A6XX_CP_MEM_POOL_SIZE, 32);

		kgsl_regwrite(device, A6XX_CP_MEM_POOL_SIZE, 0x30);

	else

		kgsl_regwrite(device, A6XX_CP_MEM_POOL_SIZE, 128);

		kgsl_regwrite(device, A6XX_CP_MEM_POOL_SIZE, 0x80);



	/* Setting the primFifo thresholds values */

	if (adreno_is_a640(adreno_dev))
@@ -1750,7 +1750,6 @@ static struct adreno_irq a6xx_irq = { 


static struct adreno_snapshot_sizes a6xx_snap_sizes = {

	.cp_pfp = 0x33,

	.roq = 0x400,

};



static struct adreno_snapshot_data a6xx_snapshot_data = {

drivers/gpu/msm/adreno_a6xx_snapshot.c

+7 −5
Original line number Diff line number Diff line
@@ -1497,10 +1497,6 @@ void a6xx_snapshot(struct adreno_device *adreno_dev, 
	bool sptprac_on, gx_on = true;

	unsigned int i, roq_size;



	/* ROQ size is 0x800 DW on a640 and a680 */

	roq_size = adreno_is_a640(adreno_dev) || adreno_is_a680(adreno_dev) ?

		(snap_data->sect_sizes->roq * 2) : snap_data->sect_sizes->roq;



	/* GMU TCM data dumped through AHB */

	if (GMU_DEV_OP_VALID(gmu_dev_ops, snapshot))

		gmu_dev_ops->snapshot(adreno_dev, snapshot);
@@ -1552,7 +1548,13 @@ void a6xx_snapshot(struct adreno_device *adreno_dev, 
		A6XX_CP_SQE_UCODE_DBG_ADDR, A6XX_CP_SQE_UCODE_DBG_DATA,

		0, 0x6000);



	/* CP ROQ */

	/*

	 * CP ROQ dump units is 4dwords. The number of units is stored

	 * in CP_ROQ_THRESHOLDS_2[31:16]. Read the value and convert to

	 * dword units.

	 */

	kgsl_regread(device, A6XX_CP_ROQ_THRESHOLDS_2, &roq_size);

	roq_size = roq_size >> 14;

	kgsl_snapshot_add_section(device, KGSL_SNAPSHOT_SECTION_DEBUG,

		snapshot, adreno_snapshot_cp_roq, &roq_size);