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Commit 96909778 authored by Xiaowei Song's avatar Xiaowei Song Committed by Wei Xu
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arm64: dts: hisi: add kirin pcie node 



Add PCIe node for hi3660

Cc: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: default avatarXiaowei Song <songxiaowei@hisilicon.com>
Acked-by: default avatarArnd Bergmann <arnd@arndb.de>

Changes in v5:
 * fix interrupt-map, to conform to gic's #address-cells = <0>
 * remove redundant status = "ok"
Signed-off-by: default avatarWei Xu <xuwei5@hisilicon.com>
parent e6db6089

arch/arm64/boot/dts/hisilicon/hi3660.dtsi

+36 −0
Original line number Diff line number Diff line
@@ -754,5 +754,41 @@ 
			cs-gpios = <&gpio18 5 0>;

			status = "disabled";

		};



		pcie@f4000000 {

			compatible = "hisilicon,kirin960-pcie";

			reg = <0x0 0xf4000000 0x0 0x1000>,

			      <0x0 0xff3fe000 0x0 0x1000>,

			      <0x0 0xf3f20000 0x0 0x40000>,

			      <0x0 0xf5000000 0x0 0x2000>;

			reg-names = "dbi", "apb", "phy", "config";

			bus-range = <0x0  0x1>;

			#address-cells = <3>;

			#size-cells = <2>;

			device_type = "pci";

			ranges = <0x02000000 0x0 0x00000000

				  0x0 0xf6000000

				  0x0 0x02000000>;

			num-lanes = <1>;

			#interrupt-cells = <1>;

			interrupt-map-mask = <0xf800 0 0 7>;

			interrupt-map = <0x0 0 0 1

					 &gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,

					<0x0 0 0 2

					 &gic GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,

					<0x0 0 0 3

					 &gic GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,

					<0x0 0 0 4

					 &gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&crg_ctrl HI3660_PCIEPHY_REF>,

				 <&crg_ctrl HI3660_CLK_GATE_PCIEAUX>,

				 <&crg_ctrl HI3660_PCLK_GATE_PCIE_PHY>,

				 <&crg_ctrl HI3660_PCLK_GATE_PCIE_SYS>,

				 <&crg_ctrl HI3660_ACLK_GATE_PCIE>;

			clock-names = "pcie_phy_ref", "pcie_aux",

				      "pcie_apb_phy", "pcie_apb_sys",

				      "pcie_aclk";

			reset-gpios = <&gpio11 1 0 >;

		};

	};

};