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Commit 967e7bde authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau: initial pass at moving to struct nvif_device 



This is an attempt at isolating some of the changes necessary to port
to NVIF in a separate commit.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent db2bec18

drivers/gpu/drm/nouveau/dispnv04/arb.c

+3 −3
Original line number Diff line number Diff line
@@ -198,7 +198,7 @@ nv04_update_arb(struct drm_device *dev, int VClk, int bpp, 
		int *burst, int *lwm)

{

	struct nouveau_drm *drm = nouveau_drm(dev);

	struct nouveau_object *device = nouveau_drm(dev)->device;

	struct nvif_device *device = &nouveau_drm(dev)->device;

	struct nv_fifo_info fifo_data;

	struct nv_sim_state sim_data;

	int MClk = nouveau_hw_get_clock(dev, PLL_MEMORY);
@@ -227,7 +227,7 @@ nv04_update_arb(struct drm_device *dev, int VClk, int bpp, 
		sim_data.mem_page_miss = ((cfg1 >> 4) & 0xf) + ((cfg1 >> 31) & 0x1);

	}



	if (nv_device(drm->device)->card_type == NV_04)

	if (drm->device.info.family == NV_DEVICE_INFO_V0_TNT)

		nv04_calc_arb(&fifo_data, &sim_data);

	else

		nv10_calc_arb(&fifo_data, &sim_data);
@@ -254,7 +254,7 @@ nouveau_calc_arb(struct drm_device *dev, int vclk, int bpp, int *burst, int *lwm 
{

	struct nouveau_drm *drm = nouveau_drm(dev);



	if (nv_device(drm->device)->card_type < NV_20)

	if (drm->device.info.family < NV_DEVICE_INFO_V0_KELVIN)

		nv04_update_arb(dev, vclk, bpp, burst, lwm);

	else if ((dev->pdev->device & 0xfff0) == 0x0240 /*CHIPSET_C51*/ ||

		 (dev->pdev->device & 0xfff0) == 0x03d0 /*CHIPSET_C512*/) {

drivers/gpu/drm/nouveau/dispnv04/crtc.c

+19 −19
Original line number Diff line number Diff line
@@ -111,8 +111,8 @@ static void nv_crtc_calc_state_ext(struct drm_crtc *crtc, struct drm_display_mod 
{

	struct drm_device *dev = crtc->dev;

	struct nouveau_drm *drm = nouveau_drm(dev);

	struct nouveau_bios *bios = nouveau_bios(drm->device);

	struct nouveau_clock *clk = nouveau_clock(drm->device);

	struct nouveau_bios *bios = nvkm_bios(&drm->device);

	struct nouveau_clock *clk = nvkm_clock(&drm->device);

	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

	struct nv04_mode_state *state = &nv04_display(dev)->mode_reg;

	struct nv04_crtc_reg *regp = &state->crtc_reg[nv_crtc->index];
@@ -136,7 +136,7 @@ static void nv_crtc_calc_state_ext(struct drm_crtc *crtc, struct drm_display_mod 
	 * has yet been observed in allowing the use a single stage pll on all

	 * nv43 however.  the behaviour of single stage use is untested on nv40

	 */

	if (nv_device(drm->device)->chipset > 0x40 && dot_clock <= (pll_lim.vco1.max_freq / 2))

	if (drm->device.info.chipset > 0x40 && dot_clock <= (pll_lim.vco1.max_freq / 2))

		memset(&pll_lim.vco2, 0, sizeof(pll_lim.vco2));
@@ -146,10 +146,10 @@ static void nv_crtc_calc_state_ext(struct drm_crtc *crtc, struct drm_display_mod 
	state->pllsel &= PLLSEL_VPLL1_MASK | PLLSEL_VPLL2_MASK | PLLSEL_TV_MASK;



	/* The blob uses this always, so let's do the same */

	if (nv_device(drm->device)->card_type == NV_40)

	if (drm->device.info.family == NV_DEVICE_INFO_V0_CURIE)

		state->pllsel |= NV_PRAMDAC_PLL_COEFF_SELECT_USE_VPLL2_TRUE;

	/* again nv40 and some nv43 act more like nv3x as described above */

	if (nv_device(drm->device)->chipset < 0x41)

	if (drm->device.info.chipset < 0x41)

		state->pllsel |= NV_PRAMDAC_PLL_COEFF_SELECT_SOURCE_PROG_MPLL |

				 NV_PRAMDAC_PLL_COEFF_SELECT_SOURCE_PROG_NVPLL;

	state->pllsel |= nv_crtc->index ? PLLSEL_VPLL2_MASK : PLLSEL_VPLL1_MASK;
@@ -275,7 +275,7 @@ nv_crtc_mode_set_vga(struct drm_crtc *crtc, struct drm_display_mode *mode) 
		horizEnd = horizTotal - 2;

		horizBlankEnd = horizTotal + 4;

#if 0

		if (dev->overlayAdaptor && nv_device(drm->device)->card_type >= NV_10)

		if (dev->overlayAdaptor && drm->device.info.family >= NV_DEVICE_INFO_V0_CELSIUS)

			/* This reportedly works around some video overlay bandwidth problems */

			horizTotal += 2;

#endif
@@ -509,7 +509,7 @@ nv_crtc_mode_set_regs(struct drm_crtc *crtc, struct drm_display_mode * mode) 
	regp->cursor_cfg = NV_PCRTC_CURSOR_CONFIG_CUR_LINES_64 |

			     NV_PCRTC_CURSOR_CONFIG_CUR_PIXELS_64 |

			     NV_PCRTC_CURSOR_CONFIG_ADDRESS_SPACE_PNVM;

	if (nv_device(drm->device)->chipset >= 0x11)

	if (drm->device.info.chipset >= 0x11)

		regp->cursor_cfg |= NV_PCRTC_CURSOR_CONFIG_CUR_BPP_32;

	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)

		regp->cursor_cfg |= NV_PCRTC_CURSOR_CONFIG_DOUBLE_SCAN_ENABLE;
@@ -550,26 +550,26 @@ nv_crtc_mode_set_regs(struct drm_crtc *crtc, struct drm_display_mode * mode) 
	 * 1 << 30 on 0x60.830), for no apparent reason */

	regp->CRTC[NV_CIO_CRE_59] = off_chip_digital;



	if (nv_device(drm->device)->card_type >= NV_30)

	if (drm->device.info.family >= NV_DEVICE_INFO_V0_RANKINE)

		regp->CRTC[0x9f] = off_chip_digital ? 0x11 : 0x1;



	regp->crtc_830 = mode->crtc_vdisplay - 3;

	regp->crtc_834 = mode->crtc_vdisplay - 1;



	if (nv_device(drm->device)->card_type == NV_40)

	if (drm->device.info.family == NV_DEVICE_INFO_V0_CURIE)

		/* This is what the blob does */

		regp->crtc_850 = NVReadCRTC(dev, 0, NV_PCRTC_850);



	if (nv_device(drm->device)->card_type >= NV_30)

	if (drm->device.info.family >= NV_DEVICE_INFO_V0_RANKINE)

		regp->gpio_ext = NVReadCRTC(dev, 0, NV_PCRTC_GPIO_EXT);



	if (nv_device(drm->device)->card_type >= NV_10)

	if (drm->device.info.family >= NV_DEVICE_INFO_V0_CELSIUS)

		regp->crtc_cfg = NV10_PCRTC_CONFIG_START_ADDRESS_HSYNC;

	else

		regp->crtc_cfg = NV04_PCRTC_CONFIG_START_ADDRESS_HSYNC;



	/* Some misc regs */

	if (nv_device(drm->device)->card_type == NV_40) {

	if (drm->device.info.family == NV_DEVICE_INFO_V0_CURIE) {

		regp->CRTC[NV_CIO_CRE_85] = 0xFF;

		regp->CRTC[NV_CIO_CRE_86] = 0x1;

	}
@@ -581,7 +581,7 @@ nv_crtc_mode_set_regs(struct drm_crtc *crtc, struct drm_display_mode * mode) 


	/* Generic PRAMDAC regs */



	if (nv_device(drm->device)->card_type >= NV_10)

	if (drm->device.info.family >= NV_DEVICE_INFO_V0_CELSIUS)

		/* Only bit that bios and blob set. */

		regp->nv10_cursync = (1 << 25);
@@ -590,7 +590,7 @@ nv_crtc_mode_set_regs(struct drm_crtc *crtc, struct drm_display_mode * mode) 
				NV_PRAMDAC_GENERAL_CONTROL_PIXMIX_ON;

	if (crtc->primary->fb->depth == 16)

		regp->ramdac_gen_ctrl |= NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE_SEL;

	if (nv_device(drm->device)->chipset >= 0x11)

	if (drm->device.info.chipset >= 0x11)

		regp->ramdac_gen_ctrl |= NV_PRAMDAC_GENERAL_CONTROL_PIPE_LONG;



	regp->ramdac_630 = 0; /* turn off green mode (tv test pattern?) */
@@ -653,7 +653,7 @@ nv_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode, 


	nv_crtc_mode_set_vga(crtc, adjusted_mode);

	/* calculated in nv04_dfp_prepare, nv40 needs it written before calculating PLLs */

	if (nv_device(drm->device)->card_type == NV_40)

	if (drm->device.info.family == NV_DEVICE_INFO_V0_CURIE)

		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, nv04_display(dev)->mode_reg.sel_clk);

	nv_crtc_mode_set_regs(crtc, adjusted_mode);

	nv_crtc_calc_state_ext(crtc, mode, adjusted_mode->clock);
@@ -714,7 +714,7 @@ static void nv_crtc_prepare(struct drm_crtc *crtc) 


	/* Some more preparation. */

	NVWriteCRTC(dev, nv_crtc->index, NV_PCRTC_CONFIG, NV_PCRTC_CONFIG_START_ADDRESS_NON_VGA);

	if (nv_device(drm->device)->card_type == NV_40) {

	if (drm->device.info.family == NV_DEVICE_INFO_V0_CURIE) {

		uint32_t reg900 = NVReadRAMDAC(dev, nv_crtc->index, NV_PRAMDAC_900);

		NVWriteRAMDAC(dev, nv_crtc->index, NV_PRAMDAC_900, reg900 & ~0x10000);

	}
@@ -888,7 +888,7 @@ nv04_crtc_do_mode_set_base(struct drm_crtc *crtc, 
	crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_FF_INDEX);

	crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_FFLWM__INDEX);



	if (nv_device(drm->device)->card_type >= NV_20) {

	if (drm->device.info.family >= NV_DEVICE_INFO_V0_KELVIN) {

		regp->CRTC[NV_CIO_CRE_47] = arb_lwm >> 8;

		crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_47);

	}
@@ -969,7 +969,7 @@ static void nv11_cursor_upload(struct drm_device *dev, struct nouveau_bo *src, 
		{

			struct nouveau_drm *drm = nouveau_drm(dev);



			if (nv_device(drm->device)->chipset == 0x11) {

			if (drm->device.info.chipset == 0x11) {

				pixel = ((pixel & 0x000000ff) << 24) |

					((pixel & 0x0000ff00) << 8) |

					((pixel & 0x00ff0000) >> 8) |
@@ -1010,7 +1010,7 @@ nv04_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv, 
	if (ret)

		goto out;



	if (nv_device(drm->device)->chipset >= 0x11)

	if (drm->device.info.chipset >= 0x11)

		nv11_cursor_upload(dev, cursor, nv_crtc->cursor.nvbo);

	else

		nv04_cursor_upload(dev, cursor, nv_crtc->cursor.nvbo);

drivers/gpu/drm/nouveau/dispnv04/cursor.c

+1 −1
Original line number Diff line number Diff line
@@ -55,7 +55,7 @@ nv04_cursor_set_offset(struct nouveau_crtc *nv_crtc, uint32_t offset) 
	crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR0_INDEX);

	crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR1_INDEX);

	crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_HCUR_ADDR2_INDEX);

	if (nv_device(drm->device)->card_type == NV_40)

	if (drm->device.info.family == NV_DEVICE_INFO_V0_CURIE)

		nv_fix_nv40_hw_cursor(dev, nv_crtc->index);

}

drivers/gpu/drm/nouveau/dispnv04/dac.c

+7 −7
Original line number Diff line number Diff line
@@ -65,8 +65,8 @@ int nv04_dac_output_offset(struct drm_encoder *encoder) 


static int sample_load_twice(struct drm_device *dev, bool sense[2])

{

	struct nouveau_object *device = nouveau_drm(dev)->device;

	struct nouveau_timer *ptimer = nouveau_timer(device);

	struct nvif_device *device = &nouveau_drm(dev)->device;

	struct nouveau_timer *ptimer = nvkm_timer(device);

	int i;



	for (i = 0; i < 2; i++) {
@@ -128,7 +128,7 @@ static enum drm_connector_status nv04_dac_detect(struct drm_encoder *encoder, 
						 struct drm_connector *connector)

{

	struct drm_device *dev = encoder->dev;

	struct nouveau_object *device = nouveau_drm(dev)->device;

	struct nvif_device *device = &nouveau_drm(dev)->device;

	struct nouveau_drm *drm = nouveau_drm(dev);

	uint8_t saved_seq1, saved_pi, saved_rpc1, saved_cr_mode;

	uint8_t saved_palette0[3], saved_palette_mask;
@@ -231,8 +231,8 @@ uint32_t nv17_dac_sample_load(struct drm_encoder *encoder) 
{

	struct drm_device *dev = encoder->dev;

	struct nouveau_drm *drm = nouveau_drm(dev);

	struct nouveau_object *device = nouveau_drm(dev)->device;

	struct nouveau_gpio *gpio = nouveau_gpio(device);

	struct nvif_device *device = &nouveau_drm(dev)->device;

	struct nouveau_gpio *gpio = nvkm_gpio(device);

	struct dcb_output *dcb = nouveau_encoder(encoder)->dcb;

	uint32_t sample, testval, regoffset = nv04_dac_output_offset(encoder);

	uint32_t saved_powerctrl_2 = 0, saved_powerctrl_4 = 0, saved_routput,
@@ -283,7 +283,7 @@ uint32_t nv17_dac_sample_load(struct drm_encoder *encoder) 
	/* nv driver and nv31 use 0xfffffeee, nv34 and 6600 use 0xfffffece */

	routput = (saved_routput & 0xfffffece) | head << 8;



	if (nv_device(drm->device)->card_type >= NV_40) {

	if (drm->device.info.family >= NV_DEVICE_INFO_V0_CURIE) {

		if (dcb->type == DCB_OUTPUT_TV)

			routput |= 0x1a << 16;

		else
@@ -398,7 +398,7 @@ static void nv04_dac_mode_set(struct drm_encoder *encoder, 
	}



	/* This could use refinement for flatpanels, but it should work this way */

	if (nv_device(drm->device)->chipset < 0x44)

	if (drm->device.info.chipset < 0x44)

		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0xf0000000);

	else

		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0x00100000);

drivers/gpu/drm/nouveau/dispnv04/dfp.c

+6 −6
Original line number Diff line number Diff line
@@ -281,7 +281,7 @@ static void nv04_dfp_mode_set(struct drm_encoder *encoder, 
			      struct drm_display_mode *adjusted_mode)

{

	struct drm_device *dev = encoder->dev;

	struct nouveau_object *device = nouveau_drm(dev)->device;

	struct nvif_device *device = &nouveau_drm(dev)->device;

	struct nouveau_drm *drm = nouveau_drm(dev);

	struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);

	struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];
@@ -416,7 +416,7 @@ static void nv04_dfp_mode_set(struct drm_encoder *encoder, 
	if ((nv_connector->dithering_mode == DITHERING_MODE_ON) ||

	    (nv_connector->dithering_mode == DITHERING_MODE_AUTO &&

	     encoder->crtc->primary->fb->depth > connector->display_info.bpc * 3)) {

		if (nv_device(drm->device)->chipset == 0x11)

		if (drm->device.info.chipset == 0x11)

			regp->dither = savep->dither | 0x00010000;

		else {

			int i;
@@ -427,7 +427,7 @@ static void nv04_dfp_mode_set(struct drm_encoder *encoder, 
			}

		}

	} else {

		if (nv_device(drm->device)->chipset != 0x11) {

		if (drm->device.info.chipset != 0x11) {

			/* reset them */

			int i;

			for (i = 0; i < 3; i++) {
@@ -463,7 +463,7 @@ static void nv04_dfp_commit(struct drm_encoder *encoder) 
		NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL);



	/* This could use refinement for flatpanels, but it should work this way */

	if (nv_device(drm->device)->chipset < 0x44)

	if (drm->device.info.chipset < 0x44)

		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0xf0000000);

	else

		NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + nv04_dac_output_offset(encoder), 0x00100000);
@@ -485,7 +485,7 @@ static void nv04_dfp_update_backlight(struct drm_encoder *encoder, int mode) 
{

#ifdef __powerpc__

	struct drm_device *dev = encoder->dev;

	struct nouveau_object *device = nouveau_drm(dev)->device;

	struct nvif_device *device = &nouveau_drm(dev)->device;



	/* BIOS scripts usually take care of the backlight, thanks

	 * Apple for your consistency.
@@ -623,7 +623,7 @@ static void nv04_tmds_slave_init(struct drm_encoder *encoder) 
	struct drm_device *dev = encoder->dev;

	struct dcb_output *dcb = nouveau_encoder(encoder)->dcb;

	struct nouveau_drm *drm = nouveau_drm(dev);

	struct nouveau_i2c *i2c = nouveau_i2c(drm->device);

	struct nouveau_i2c *i2c = nvkm_i2c(&drm->device);

	struct nouveau_i2c_port *port = i2c->find(i2c, 2);

	struct nouveau_i2c_board_info info[] = {

		{