clk: sunxi: Implement MMC phase control

/**

 * clk_sunxi_mmc_phase_control() - configures MMC clock phase control

 */

void clk_sunxi_mmc_phase_control(struct clk_hw *hw, u8 sample, u8 output)

{

	#define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw)

	#define to_clk_factors(_hw) container_of(_hw, struct clk_factors, hw)

	struct clk_composite *composite = to_clk_composite(hw);

	struct clk_hw *rate_hw = composite->rate_hw;

	struct clk_factors *factors = to_clk_factors(rate_hw);

	unsigned long flags = 0;

	u32 reg;

	if (factors->lock)

		spin_lock_irqsave(factors->lock, flags);

	reg = readl(factors->reg);

	/* set sample clock phase control */

	reg &= ~(0x7 << 20);

	reg |= ((sample & 0x7) << 20);

	/* set output clock phase control */

	reg &= ~(0x7 << 8);

	reg |= ((output & 0x7) << 8);

	writel(reg, factors->reg);

	if (factors->lock)

		spin_unlock_irqrestore(factors->lock, flags);

}

EXPORT_SYMBOL(clk_sunxi_mmc_phase_control);

/**

 * sunxi_factors_clk_setup() - Setup function for factor clocks

 */

/*

 * Copyright 2013 - Hans de Goede <hdegoede@redhat.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */

#ifndef __LINUX_CLK_SUNXI_H_

#define __LINUX_CLK_SUNXI_H_

#include <linux/clk.h>

void clk_sunxi_mmc_phase_control(struct clk_hw *hw, u8 sample, u8 output);

#endif